DAC80508-04EVM: DAC80508 SPI SDO (MISO) not working

Chris Hector

Part Number: DAC80508-04EVM
Other Parts Discussed in Thread: DAC80508

Tool/software:

I'm getting some unexpected behavior with the SPI bus. I'm hooked into an NXP RT1176 chip using the LPSPI1 bus. I've verified the timing looks good from the MCU: data is being sent on each rising edge of the clock, so it should be latched correctly by the DAC80508. I'm seeing two main problems right now:

1. When I send a command (any command, read or write) I only get the bits I have sent the DAC80508 to the SDI pin being sent back out the SDO pin. Sending a read command of, say, the DEVID register (0x810000) returns the same on the SDO pin, 0x810000. Similar for any other register. Sending a write command exhibits the same behavior, with no change if I read the register out again following a write. The clock is slow, 2usec period, 20kHz.

Here is my test where I am just reading the DEVID register:

I assume this means that the chip is 'working' but for some reason is not reading or sending the data.

The one part I wasn't positive about from the timing diagram was the CS. It appears to go low during the high part of the clock pulse. I wasn't sure if that was necessary. I figured because it was sending the command identically back from SDO that this meant my timing was correct here.

This is the eval board, so it is the DAC80508ZRTET chip, which means the SDO pin should be output and not CLR

2. When I power the DAC80508 with a 5V power supply to VDO, some of the return bits on the SDO line are out of phase. Screenshot attached... I send it 0x040873 as a test and I see back 0x0411dc, which you can see from the scope shot looks like the final bits were read too quickly (ignore the small glitches, when I check those lines on the analog scope they are not present, just a crosstalk issue with the scope)

When I switch the power into VDO to 3.3V, this behavior goes away and the bits align correctly, returning the same 24 bit frame I sent on SDI back out on SDO on return regardless of it being a read or write

What might I be doing wrong here? What am I missing?

4 months ago

0 Katlynne Jones 4 months ago

TI__Mastermind 42273 points

Hi Chris,

Have you removed the jumper on J1 to disconnect the EVMs on-board SPI controller from the device?

Have you confirmed writes to the DAC are working? Can you toggle the internal reference and measure the VREF pin to check that the reference is really responding?

It is expected that data clocked in on SDI comes out on SDO. This is separate than a read command which follows this structure:

CS does need to go high and back low in-between the read command, and the dummy command to access the readback.

There are two separate supplies on the device. VDD and VIO. Which one are you referring to? Are you using the USB connection at all?

You are powering with 5V and 3.3V, what is the logic level of your SPI signals?

Best,

Katlynne Jones

0 Chris Hector 4 months ago in reply to Katlynne Jones

Prodigy 10 points

Hi Katlynne, thank you for your reply

J1 is short: "To use external communication, close jumper J1 to disable the connection to the FTDI controller."
J6 is open: "Remove the jumper connector on J6 before connecting external supplies to VDD"
J5 is shorting pins 1+2: "SHORT 1-2 – VIO is connected to VDD (default)"

An external supply (from my dev board) is connected to VDD using the banana plug, either 5V (causes timing error) or 3.3V

The VREF pin reads 2.5V when the power supply is on, and 2.12V if the power supply is not connected while data is being sent over SPI

I am not using the USB connection at all

VREF does not appear to change. Here is a send of 0x0100 to the GAIN register, upper trace is the voltage of VREF which does not change from 2.5V

0 Katlynne Jones 4 months ago in reply to Chris Hector

TI__Mastermind 42273 points

Hi Chris,

Thanks.

My mistake, this jumper acts as a disable, so short is correct.

Chris Hector said:
J1 is short: "To use external communication, close jumper J1 to disable the connection to the FTDI controller."

The rest of your jumpers are correct.

Do you mean here that you have no VDD or VIO connected, just the SPI pins? Do not operate the device under this condition as it could damage the device.

Chris Hector said:
and 2.12V if the power supply is not connected

Is J12 open or closed? The device has an internal reference that is powered on by default, but the EVM also has an onboard reference. If you have the on-board reference connected to VREF while the DAC is powered off, then the DAC might be pulling the onboard reference down through the internal ESD cells.

The GAIN register does not change the reference brought out on the VREF pin. It is an internal divided signal that is input to the DAC ladder. Can you make sure J12 is unpopulated and write 0x0100 to register 0x3?

3.3V SPI is not going to work with a 5V VDD. The VIH (logic input high level) is 0.7V*VDD which is 3.5V at a 5V VDD. 3.3V logic does not meet this threshold.

Best,

Katlynne Jones

0 Chris Hector 4 months ago in reply to Katlynne Jones

Prodigy 10 points

Hi Katlynne,

Right now, VDD and VIO are connected via the jumper and VDD is fed a 3.3V signal from my dev board so both are 3.3V.

The SPI from the NXP is running as a 3.3V signal. This makes sense as to why the 5V does not act correctly, VIO must by the same as the SPI bus, 3.3V. I assume you meant 0.7*VIO, confirming with this screenshot from the manual:

J12 has been open for these tests

Still nothing running that test...

Screenshot has: write 0x0100 to register 0x3, then read reg 0x1 (2 24 clock cycles) then write 0x0000 to reg 0x3, then read reg 3

Here is the code to confirm:

while(1) {
 // Read register 0x1 (should return non-zero)
 status = DAC80508_ReadRegister(handle, DAC80508_REG_DEVID, &reg_value[0]);
 if (status != DAC80508_OK || reg_value[0] != 0x0)
 {
 //return DAC80508_READ_REG_ERR;
 }
 // Write 0x0000 to register 0x3
 status = DAC80508_WriteRegister(handle, DAC80508_REG_CONFIG, 0x0000);
 if (status != DAC80508_OK)
 {
 //return DAC80508_WRITE_REG_ERR;
 }
 // Read register 0x3 (should return 0)
 status = DAC80508_ReadRegister(handle, DAC80508_REG_CONFIG, &reg_value[0]);
 if (status != DAC80508_OK || reg_value[0] != 0x0)
 {
 //return DAC80508_READ_REG_ERR;
 }
 // Write 0x0100 to register 0x3
 status = DAC80508_WriteRegister(handle, DAC80508_REG_CONFIG, 0x0100);
 if (status != DAC80508_OK)
 {
 //return DAC80508_WRITE_REG_ERR;
 }
}

+1 Katlynne Jones 4 months ago in reply to Chris Hector

TI__Mastermind 42273 points

Hi Chris,

Yes, this is correct. Because this device has a separate supply for VIO, the logic high level is 0.7V*VIO. You could use a 5V VDD and 3.3V VIO if you needed a higher analog supply with lower logic level.

Chris Hector said:
I assume you meant 0.7*VIO, confirming with this screenshot from the manual

Can you share the analog view of the same write sequence above?

It looks like you are still missing the CS toggle between the read command and the next dummy cycle for the data to be clocked out:

Have you ever tried using the EVM GUI as a first step to confirm there is nothing damaged with the device itself? This may be a good next step to rule out the board/device as an issue.

Best,

Katlynne Jones

0 Chris Hector 4 months ago in reply to Katlynne Jones

Prodigy 10 points

Thanks Katlynne,

There was an issue with the CS pin on the RT1176 that I didn't realize with the continuous mode. Adding the CS between the read request and the read works, thank you!

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DAC80508-04EVM: DAC80508 SPI SDO (MISO) not working