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PCM1821-Q1: 24bit output

Kazuki Kuramochi
Genius 10935 points
Part Number: PCM1821-Q1
Other Parts Discussed in Thread: PCM1808-Q1, PCM3120-Q1

Hello Expert,


Our customer is considering to use this device.

Their SoC is supported digital audio format up to 24bit.
However, the datasheet is only talking about 32bit.

Then, Can this device support 24bit if they supply 24bit BCLK refer to FSYNC?

 

Best regards,
Kazuki Kuramochi

  • 0
    TI__Expert 6375 points

    Hi Kuramochi-san,

    This device only supports 32 bit output channel data word length, so it will not support 24 bit.

    PCM1808-Q1 supports 24-bit data and is hardware controlled, but only supports single-ended inputs.

    PCM3120-Q1 offers equal performance with software control and supports 24 bit data.

    Best,

    Garret

  • 0 in reply to Garret Godfrey
    TI__Genius 10935 points

    Hi Garret-san,

    This is a confirmation.
    As you can see, this device has following ratio requirement between FSYNC and BCLK as below.

    During BCLK to FSYNC RATIO is 24, device cannot output 32bit data physically.
    Therefore, in slave condition with appropriate frequency clock supply, I expect it can support 24bit.

    How do you think about this points?

    Also, could you please tell me data format during ration is 24 or multiplication of 24?

    Best regards,
    Kazuki Kuramochi

  • 0 in reply to Kazuki Kuramochi
    TI__Expert 6375 points

    Hi Kuramochi-san,

    I checked this in the lab and confirmed minimum BCLK to FSYNC ratio is 32. To support 24 bit data, you could pad with zeros similar to shown here:

    I will investigate why Table 8-3 datasheet includes 16 and 24 as valid ratios.

    Best,

    Garret

  • 0 in reply to Garret Godfrey
    TI__Genius 10935 points

    Hi Garret-san,

    As I talked, customer SoC cannot use 32bit signal if it is zero padded at lower 8bit.
    It can support upto truly 24bit signal.
    So we need conclusion for 16 and 24 as soon as possible.

    How about the confirmation result for 16 and 24?

    If this device cannot output 24bit signal, they have to change device.
    However, they already started layout design so they don't want to change device as far as possible.

    Best regards,
    Kazuki Kuramochi

  • 0 in reply to Kazuki Kuramochi
    TI__Expert 6375 points

    Hi Kuramochi-san,

    According to the datasheet (page 15), the minimum is 32 BCLKs per frame. It cannot support 24BCLK. 24bits would have to be sent with 8 bit delay between channels as I mentioned in the last post.

    Best,

    Garret

  • 0 in reply to Garret Godfrey
    TI__Genius 10935 points

    Hi Garret-san,

    I'd like to make sure about your previous suggestion.
    You suggest us to use PCM3120-Q1 if customer need 24bit data.
    However, at that time, you may had wrong understanding for customer requirement as we talked.

    Then, Can PCM3120-Q1 output true 24bit data? or is it just lower 8 bit zero padded 32bit data?

    Best regards,
    Kazuki Kuramochi

  • 0 in reply to Kazuki Kuramochi
    TI__Expert 6375 points

    Hi Kuramochi-san,

    PCM3120-Q1 can support true 24bit data. You select this by writing 10b to bits 5-4 of the ASI_CFG0 register at address 0x7.

    Best,

    Garret