PCM9211: PCM9211 : use i2s as input via AUXIN0 and SPDIF output

Stefano xi

Part Number: PCM9211

Hi everyone,
Sorry, I've read a lot of forum pages about the PC9211, but I haven't found a solution:
I've always used the PC9211 with an SPDIF input as a selector to send the desired input to MPO0. Now I'd also like to add an I2S input. My idea was to route it to AUXIN0, pass through the DIT, and always output SPDIF to MPO0.
What I always get at the output is a fixed clock, not an audio signal (even if I mute the registers).
I thought it was enough to set the following registers:
0x40 = 0xA0
0x60 = 0x33
0x61 = 0x20
0x62 = 0x00
0x78 = 0x0D
I'm also attaching the routing I wanted to do:

1 month ago

0 Arash Loloee 1 month ago

TI__Mastermind 33581 points

Hi,

can you confirm register 0x40 is 0xA0 or (xC0) , the reset is 11000000 (xC0) . 10100000 as you have it is not the default. If this is not the issue or you have any other register beside the above, let me know and I will look into it more.

Regards,

Arash

0 Stefano xi 1 month ago in reply to Arash Loloee

Prodigy 10 points

Hi Arash,
I checked all the registers and they are all default except the ones indicated.
I reset register 0x40 to 0xC0 by default.
The result is the same: at MPO0 output, I get a fixed 1.54 MHz waveform, whether I'm playing an input signal or not.

If I read register 0x38, I see the correct playback clock (96 or 44.1).

Thanks,
Stefano

0 Arash Loloee 1 month ago in reply to Stefano xi

TI__Mastermind 33581 points

Hi Stefano,

I don't see any issue with the code above, I suspect may be a register is missing in the path.

also verify the correct format of data and clks of I2S; note that BCLK has to be equal to # of Ch. x Ch depth x Fs.

I have a few script for this device, you can start from one of them and do the above modifications/additions to the end of the script to see if it helps .

Fullscreen 6354.PCM9211_Init.txt Download

#**************************************
#this script is for SPDIF-->RXIN0-->DIR-->MainOutput, Record sound from SPDIF to PC through TAS1020

#So
#1, Chose RXIN0 to DIR
#2, Active DIR
#3, chose DIR output as Mainoutput's source.

#Also HW modification
#1, Flying to High Level(3.3V) to make sure U7's output is Hi-Z
#or 2, TAS1020 output logic high on P1.2 I2S enable signal. 
#**************************************


#System RST Control
#w 80 40 00
w 80 40 33
w 80 40 C0

#XTI Source, Clock (SCK/BCK/LRCK) Frequency Setting
# XTI CLK source 12.288 and BCK 3.072, LRCK 48k = XTI/512
w 80 31 1A
w 80 33 22
w 80 20 00
w 80 24 00
#ADC clock source is chosen by REG42
w 80 26 81

#XTI Source, Secondary Bit/LR Clock (SBCK/SLRCK) Frequency Setting
w 80 33 22


#*********************************************************
#-------------------------------Start DIR settings---------------------------------------
#REG. 21h, DIR Receivable Incoming Biphase's Sampling Frequency Range Setting
w 80 21 00

#REG. 22h, DIR CLKSTP and VOUT delay
w 80 22 01

#REG. 23h, DIR OCS start up wait time and Process for Parity Error Detection and ERROR Release Wait Time Setting
w 80 23 04

# REG 27h DIR Acceptable fs Range Setting & Mask
w 80 27 00

# REG 2Fh, DIR Output Data Format, 24bit I2S mode
w 80 2F 04

# REG. 30h, DIR Recovered System Clock (SCK) Ratio Setting
w 80 30 02

#REG. 32h, DIR Source, Secondary Bit/LR Clock (SBCK/SLRCK) Frequency Setting
w 80 32 22

#REG 34h DIR Input Biphase Signal Source Select and RXIN01 Coaxial Amplifier
#--PWR down amplifier, Select RXIN2
#w 80 34 C2
#--PWR up amplifier, select RXIN0
w 80 34 00
#--PWR up amplifier, select RXIN1
#w 80 34 01

#REG. 37h, Port Sampling Frequency Calculator Measurement Target Setting, Cal and DIR Fs
w 80 37 00
#REG 38h rd DIR Fs
r 80 38 01
#***********************************************************
#------------------------------------ End DIR settings------------------------------------------


#***********************************************************
#---------------------------------Start  MainOutput Settings--------------------------------------
#MainOutput
#REG. 6Ah, Main Output & AUXOUT Port Control
w 80 6A 00

#REG. 6Bh, Main Output Port (SCKO/BCK/LRCK/DOUT) Source Setting
w 80 6B 11

#REG. 6Dh, MPIO_B & Main Output Port Hi-Z Control
w 80 6D 00
#***********************************************************
#------------------------------------ End MainOutput settings------------------------------------------

# read back all registers to ensure GUI integrity
r 80 20 5E

Fullscreen SPDIF Record via TAS1020 through RXIN6 in MainOutput.txt Download

#**************************************
#this script is for SPDIF-->RXIN6-->DIR-->MainOutput, Record sound from SPDIF to PC through TAS1020

#So
#1, Chose RXIN6 to DIR
#2, Active DIR
#3, chose DIR output as Mainoutput's source.
#4, In existing EVM need to configure U11 and U10 to active RXIN6 input to PCM9210 
#*****************************
w 70 40 40
#*****************************

#Also HW modification
#1, Flying to High Level(3.3V) to make sure U7's output is Hi-Z
#or 2, TAS1020 output logic high on P1.2 I2S enable signal. 
#**************************************

#System RST Control
#w 80 40 00
w 80 40 33
w 80 40 C0

#XTI Source, Clock (SCK/BCK/LRCK) Frequency Setting
# XTI CLK source 12.288 and BCK 3.072, LRCK 48k = XTI/512
w 80 31 1A
w 80 33 22
w 80 20 00
w 80 24 00
#ADC clock source is chosen by REG42
w 80 26 81

#XTI Source, Secondary Bit/LR Clock (SBCK/SLRCK) Frequency Setting
w 80 33 22


#*********************************************************
#-------------------------------Start DIR settings---------------------------------------
#REG. 21h, DIR Receivable Incoming Biphase's Sampling Frequency Range Setting
w 80 21 00

#REG. 22h, DIR CLKSTP and VOUT delay
w 80 22 01

#REG. 23h, DIR OCS start up wait time and Process for Parity Error Detection and ERROR Release Wait Time Setting
w 80 23 04

# REG 27h DIR Acceptable fs Range Setting & Mask
w 80 27 00

# REG 2Fh, DIR Output Data Format, 24bit I2S mode
w 80 2F 04

# REG. 30h, DIR Recovered System Clock (SCK) Ratio Setting
w 80 30 02

#REG. 32h, DIR Source, Secondary Bit/LR Clock (SBCK/SLRCK) Frequency Setting
w 80 32 22

#REG 34h DIR Input Biphase Signal Source Select and RXIN01 Coaxial Amplifier
#--PWR down amplifier, Select RXIN6
w 80 34 C6
#--PWR up amplifier, select RXIN0
#w 80 34 00
#--PWR up amplifier, select RXIN1
#w 80 34 01

#REG. 37h, Port Sampling Frequency Calculator Measurement Target Setting, Cal and DIR Fs
w 80 37 00
#REG 38h rd DIR Fs
r 80 38 01
#***********************************************************
#------------------------------------ End DIR settings------------------------------------------


#***********************************************************
#---------------------------------Start  MainOutput Settings--------------------------------------
#MainOutput
#REG. 6Ah, Main Output & AUXOUT Port Control
w 80 6A 00

#REG. 6Bh, Main Output Port (SCKO/BCK/LRCK/DOUT) Source Setting
w 80 6B 11

#REG. 6Dh, MPIO_B & Main Output Port Hi-Z Control
w 80 6D 00
#***********************************************************
#------------------------------------ End MainOutput settings------------------------------------------

Fullscreen 8255.PC Record via TAS1020 through MPIOC in DIT output.txt Download

#**************************************
#this script is for PC USB playback to TAS1020--->PCM9210 MPIOC-->AUXIN1 to DIT-->MPO0/1 SPDIF output
#MPIOC which is connect with TAS1020's BCLK WCLK, configured as AUXIN1
#So
#1, you should configred MPIOC as AUXIN1.
#2, Configure DIT settings.
#3, Chose AUXIN1 as DIT source
#4, Chose DIT out as MPO output


#System RST Control
#w 80 40 00
w 80 40 33
w 80 40 C0

#XTI Source, Clock (SCK/BCK/LRCK) Frequency Setting
w 80 31 1A
w 80 33 22
#w 80 20 00
#w 80 24 00
#w 80 26 01

#XTI Source, Secondary Bit/LR Clock (SBCK/SLRCK) Frequency Setting
#w 80 33 22

#*********************************************************
#-------------------------------Start DIR settings---------------------------------------
#REG. 60h DIT System Clock Source Select, DIT Bit clock, LR Clock, Data Source Select, here chose AUXIN1
w 80 60 44

#REG. 60h DIT System Clock Control(here is 256 Fs), DIT DSD input enable(here is disable), DIT Audio I/F Format Setting(here is I2S)
w 80 61 10

#REG. 62h DIT Output Audio Data Mute Control(no mute), DIT Output Validity Flag Control(Valid)
w 80 62 00
#***********************************************************
#------------------------------------ End DIR settings------------------------------------------

#----------------------------
#REG. 78h, MPO1, MPO0 Function Assign Setting. MPIO0 1 both output DIT
w 80 78 DD
#--------------------------


#------------MPIOC-->AUXIN1
w 80 6E 0F
w 80 6F 40
#-------------end----------------

Regards,

Arash

0 Stefano xi 1 month ago in reply to Arash Loloee

Prodigy 10 points

Hi Arash,
I did some testing.
I also moved my input from auxin0 to auxin1 via MPIO_C, but the result was the same.
However, I read about a standalone mode on MPIO_C, so I wanted to test it, and it works!
I don't understand what was causing it to not work normally, though. I think it's something with the internal clock.
In your example, you always set XTI, but is it necessary?

Thanks
Stefano

0 Arash Loloee 1 month ago in reply to Stefano xi

TI__Mastermind 33581 points

Hi Stefano,

It is good you got it to work now. The beauty of this IC is that it has many different routing options.

The PCM9211 uses the XTI source as a reference clock in order to calculate the sampling frequency of the incoming S/PDIF stream as well as one of the sources for the ADC and if PLL can not lock, the IC uses the XTI . Also when using the DIR as a clock source, the XTI source is not required. I think we set them up as general set up but might not be needed for all cases.

Kind Regards,

Arash

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PCM9211: PCM9211 : use i2s as input via AUXIN0 and SPDIF output