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TAS5630B PBTL recovery time after reset

Russell May
Intellectual 685 points
Other Parts Discussed in Thread: TAS5630B, OPA1632, TAS5630

About how much time should a TAS5630BDKD in PBTL mode need to recover after the rise of  /RESET? By recover, I mean re-establish nearly zero differential output voltage with individual outputs near their no-signal output voltages. Assume that the input voltage is zero and no overload has preceded the reset. That is not a very precise question but I am not looking for a very precise answer, just an approximation or time constant.

Would this time be affected much by the by the OC_ADJ resistor?

The circuit and components are similar to those in Figure 15 of TAS5630B.PDF (SLES217B) except it is a TAS5630BDKD, the output inductors are 15 uH, the input capacitors are X7R ceramics, the OC_ADJ resistor is 24.9K, and the inputs are driven by an OPA1632 op-amp circuit similar to the one in an EVM. This is for a non-audio application in test equipment.

  • 0
    TI__Guru**** 189401 points

    Hi, Russell, 

    This is not controlled by the OC_ADJ resistor, this is controlled by the C_STARTUP cap value.

    I BELIEVE the start-up time of the IC after /RESET is released is on the order of 100 ms plus the time it takes to charge your output filter to half PVDD. Do you see a time on this order of magnitude?

    -d2

  • 0 in reply to Don Dapkus
    Intellectual 685 points

    We have a PCB being built but it is not ready yet, there are many other circuits on it, and there is much firmware and software to be written or modified before everything is fully operational. So I used an EVM with 48VDC power supply for the measurement, flipping the RESET switch and looking at both outputs in PBTL mode. I am not including any delay from the release of the RESET switch until the outputs start to rise because I preferred not to solder a wire onto the EVM. Could such a delay be significant?

    When I release the RESET switch, both outputs rise without oscillations to about  24VDC in about  170usec. From then to about 340usec, the outputs peak slightly and bounce once until about 340usec. Modulation oscillations start and build up from about 170 to 340usec. The oscillations are at about full voltage and appear synchronized at about 340usec. There is a slight dip in  both outputs from about 450usec to 500usec. After about 500usec, the outputs appear to be stabilized.

  • 0 in reply to Russell May
    Intellectual 685 points

    The EVM I used for the measurement has a TAS5630 (not a TAS5630B) in it. Might that cause a different response?

  • 0 in reply to Russell May
    TI__Guru**** 189401 points

    Russell,

    There is no difference between the -B and non-B material in this respect.

    I've asked Steve to look at the timing for you.

    -d2

  • 0 in reply to Don Dapkus
    TI__Mastermind 18510 points

    Russell, I have measured a TAS5630B and I agree with what you measured.  (As Don mentioned, there was no change from TAS5630 to TAS5630B in this respect.)

    I triggered from /RESET going high, and there is no significant delay between that trigger and the start of rise in TAS5630B outputs.  There also is no significant difference between PBTL and BTL.

    I think you can expect TAS5630/B BTL and PBTL outputs to be stable within 1 to 2 mS after /RESET going high, with C_STARTUP = 4.7nF, the recommended value.

    Best regards,

    Steve.