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16-bit Stereo ADC that Supports I2S

Glenn Bruner
Prodigy 20 points
Other Parts Discussed in Thread: PCM1870A, PCM1801

I hoping someone can help me locate an ADC that is capable of sampling stereo analog audio input and produce a 16-bit I2S bus output digital stream.  I had been looking at using an ADC developed by Crystal/Cirrus Logic some years ago that is now obsolete.  The CS5330 was a small 8pin packaged chip that supported stereo analog audio input  but produced an 18-bit size left/right channel words.  I need something that specifically only does 16-bit.  I prefer a small chip package and supports just I2S (don't need SPI, I2C, etc).

If there isn't one specific TI ADC that can do this is there one that comes close and can be made to interface to a single I2S bus.  And if it requires a host to configure it that I can interface using a GPIO style port interface.

Appreciate any suggestions and help that can be given on this subject.

Regards,
Glenn Bruner
CA Polytechnic State Univ.

  • 0
    TI__Guru**** 189399 points

    Hi, Glenn,

    16 bits? Is this 1985? I guess you must have some kind of old system that can only accept 16 bits?

    Anywho, both PCM1801 and PCM1870A are 16-bit converters. PCM1801 is listed as NRND, but you can still buy them. PCM1807A includes a lot of extra complexity...

    -d2

  • 0 in reply to Don Dapkus
    Prodigy 20 points

    d2,

    Actually more like 1995.  But yes, I'm using a DSP chip that is expecting the left and right audio channel data in 16-bit size words.  Besides the application I'm doing, anything more is just overkill.

    Thanks for the help.  After I had posted this request I did managed to find the datasheets for those two chips and will look into them to both.  But I wanted to make sure there wasn't something else that TI might had that I wasn't finding.  TI sure has a wide variety of ADC's to choose from.

    Regards,
    Glenn

  • 0
    Prodigy 10 points
    The CS5330 has Left Justified Output. The CS5331 is I2S format.

    The CS5330 output may be truncated to 16 bits by operating it in Slave mode and only providing 16 SCK (data) clocks per LRCK phase.

    The part is still available through secondary distribution.

    I2S would be rather awkward in this scheme as it would require 17 clocks per LRCK phase.

    Some of the other Cirrus parts (even the 24 bit versions) may also be operated in a truncated fashion.