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DSD1792A /RST does Not work for analog portion?

Other Parts Discussed in Thread: DSD1792A, DSD1792

Hello

My client is using DSD1792A  and just in the Pre Production stage and  are in hurry .

Please give us your adivce  within 3days.

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##  Problem which client found

DAC (I/V amp) ouput   Normally 2Vrms==>  problem 0.09Vrms  and it stuck & stay in the problem even  though /RST held 0V

When output stuck in the problem, when 5V held to 0V, problem seems solved.. and client think this may be work around...

 

##  Condition (  If a) only Or b) only, No problem found )  in the client

a)  VCC 5V down  to 2V , then  go up  to 5V ( In this case ,3.3V  is below 1.5V)

b)  Temp is -10 deg-C  to 0 deg-C

I( client ) had attached the file for your reference.

##   PLEASE ADIVISE

We think this problem is relative Not to digital portion , but relative to analog portion.

*  Do you think  this may be occur in the DSD1792  in case?

*  Do you think this is relative to analog portion problem ?

*  Do you approve the client's work around ( 5V held to 0V) ? 

If you say this be handled in offline, please let me know.

 

7612.Problem_DSD1792A.pdf

  • Shibatanti-san,

    I would like to clarify this issue: Under normal circumstances, when both Vcc drops below 2V and Vdd drops below 1.5, the output can then recover afterward and be OK.  It is only when this happens and the temperature is below 0 C and -10C that this phenomenon occurs.  Is that correct? 

    It is mentioned that holding RST to reset the device does not fix the problem.  Has a similar method been tried with the Vcc/Vdd rails, where Vcc/Vdd are held low while RESET is asserted, and then allowed to come back up before RESET comes back?  If I understand correctly, that has worked to fix the issue by re-cycling Vcc/Vdd?

    I would think because a full power reset is assisting to fix the issue, this could still be a digital problem.  I approve of the customer's workaround so long as they make sure they do not suffer from pop, and it is suitable for their application.

  • Hello

    Thank you for your quick answer immedeiately.

    Below (==>) is client's answer, and  here is the questions

    Q1   Do you approve this is the  analog part problem?

    Q2   What  point  client should be considered for design ?   Client is using electrolytec 47uF cap for VCOML/VCOMR #21/#22 pin  decoupling cap.

    Is this problem ( temp. coeff.)  and X7R ceramic cap sould be?

            Do you have any other point?       

    ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~


    I would like to clarify this issue: Under normal circumstances,

    when both Vcc drops below 2V and Vdd drops below 1.5, the output can then recover afterward and be OK. 

    ===> Yes,  if Vcc < 2V, even Ta= -10~ 0 deg-C, No problem found

    It is only when this happens and the temperature is below 0 C and -10C that this phenomenon occurs.  Is that correct?

    ===> Yes, if Ta = 25 deg-C, even Vcc down to around 2V then go back to 5V, No problem found

    It is mentioned that holding RST to reset the device does not fix the problem. 

    Has a similar method been tried with the Vcc/Vdd rails, where Vcc/Vdd are held low while RESET is asserted,

    and then allowed to come back up before RESET comes back? 

    ==> 

    Under the phenomenon (Ta= 0deg-C) , client let the /RST down to 0V  ( in that time  Vcc  is already back to 5V, Vdd=3.3V ans they are sstable) .

     But problem did not sloved.Then client let the 5V only  to 0V intentionally, then problem solved


    If I understand correctly, that has worked to fix the issue by re-cycling Vcc/Vdd?

    ==> re-cycling Vcc only is enough. re-cycling Vdd only did not fix the problem.

    I would think because a full power reset is assisting to fix the issue, this could still be a digital problem. 

    ==> Client did not think so. client think analog part problem because they fixed by re-cycling 5v(Vcc) only.