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Sample Rate Converter Group Delay problem

Kaspars
Intellectual 880 points
Other Parts Discussed in Thread: SRC4382, SRC4193

Dear TI support team and TI community,

I have very specific problem. I have digital audio signal (192kHz) and I need to downsample (decimation) it to lower sampling rate. The lower the better, for example ~2kHz would be perfect, but also 4kHz, 8kHz and 16kHz are acceptable. And after some signal processing upsample (interpolation) back to 192kHz.

I found some Sample Rate Converters (SRC), such as SRC4193 or SRC4382, but the main problem is GROUP DELAY. 

There is no problem with Decimation, as indicated in datasheet the group delay for this operation is ~36.4/fsout = 36.4/192kHz = 0,18ms which is reasonable. The main problem is with Interpolation, where group delay is calculated as follow: 102/fsin = 102/2kHz = 51ms! 51ms is way too much. In my case for such operation 2ms is the limit. 

In other words I need to downsample (N:1) and upsample (1:N) digital audio signal in less then 2+2ms.

Are there any SRC with very low group delay? Or maybe there exist any other solution how I could solve this problem? I'll be very grateful for any comments.

Best regards,

Kaspars

  • 0
    TI__Expert 3215 points

    Kaspars,

    I am not familiar with the two chips you mentioned, but according to the formula you gave out, you would have problem with decimation as well, since fsout = 2kHz, right?

    Why don't you try to do the resampling yourself? say, in software? It seems to me you know your fin an fout, any issue with that approach?

    Susan

  • 0 in reply to susan xu
    Intellectual 880 points

    Dear Susan Xu,

    Thanks for your quick answer. Regrettably you are right, also decimation will take ~18ms which is too much. So the problem is even tougher.

    Of course I can try to do it with software, but before that, I wanted to know existing state-of-the-art solutions. Maybe I just can't find SRC with low delay?

    I'm sure in TI there are experts in SRC, so maybe they can give some comments?

    Thanks.

    Best regards,

    Kaspars

  • 0 in reply to susan xu
    Intellectual 880 points

    No one from TI support team and/or TI forum members is familiar with SRC? Please, help.

    Thanks.

    Best regards,

    Kaspars

  • 0 in reply to Kaspars
    Intellectual 880 points

    It is really sad.

  • 0 in reply to Kaspars
    Prodigy 25 points

    I think believing TI has state of the art in low delay is wrong perception. SRC for audio is small market for TI.

    The group delay is caused by linear phase mulitstage filter used in SRC. you can design your own one with minimum phase. do you need linear phase in your application?

    There are audio companies to do specific SRC for your requirements, they have their own FPGA implementation.

    Conclusion: the stage of the art is nothing to do with how big the company is, it is to do with if you are really specialist in this area!

  • 0 in reply to Yonghao Wang
    Intellectual 880 points

    Thanks Yonghao Wang for your answer.

    Yes, probably TI don't have a state of the art SRC, but I just hoped they will help with some advice.

    About our application, YES, we need linear phase. 

    Maybe you know where I can find useful information about fast decimation/interpolation (solution with FPGA is even desirable)? I have searched for several publications, patents etc. but couldn't find something suitable.

    Thanks.

  • 0 in reply to Kaspars
    Prodigy 25 points

    I am doing research on low delay SRC etc at university.

    some of our earlier finding:

    https://secure.aes.org/forum/pubs/conventions/?elib=16286

    If you contact me, I can put you in touch with some of my industry friends.