I'm interfacing a DIR9001 digital audio receiver (SPDIF) to a PCM1798 24-bit DAC, using a 96 kHz Fs. The DIR9001 will use only the PLL to develop SCK. Both chips allow a range of multipliers for this system clock signal, from 64Fs (6.144 MHz) to 512Fs (49.152 MHz). Other than choosing the same multiplier for both chips, does anything at all depend on which multiplier is chosen?
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Jack