Hi
Our customer has a question in a description of PCM1804 data sheet of 'POWER-ON AND RESET FUNCTIONS' section. The description as follows;
'The PCM1804 needs RST = low when control pins are changed or in slave mode when SCKI, LRCK, and BCK are changed.'
Question:
Does PCM1804 need hardware reset, when the sampling frequency changes between 48kHz and 44.1kHz even if a master device generates the SCKI clock continuously by PLL like a DIR?
regards,
Akio Ito
