Greetings E2E,
My customer is having the TPA2008D2 audio amplifier that they designed in.
They have designed this in to replace an obsolete audio amplifier. The following is the schematic of the
design.
Note that U64 (an external DAC) is a NO LOAD on this board. What is loaded are the components
that translate a 75kHz square wave PWM to a buffered DC voltage signal on the volume pin. The left and right
channels are driven by rounded off square waves (not the cleanest audio but works for our purposes) in which
we can vary the frequency using a pulse swallowing scheme in the FPGA. Please check the following video.
https://www.dropbox.com/s/ixol82m16h0axjo/Audio_amp_sounds_3-mode_operation.mp4?dl=0
The issue is that there seems to be an amplitude (volume level) ramping effect that varies depending on how
the SD_N, VOLUME, and RINP/N and LINP/N pins are driven. The above video shows 3 ways
of playing the same sound but where the result is different depending on the signal enabling scheme.
The sound should be an alert that beeps alternately on and off at about 1Hz rate. The first time this sound
is shown on the movie, the LCD reads “V=F=0”, which means that the volume and the L/R channels are pulsing
between their on states and off states. The second time this sound is shown in the movie, the LCD reads “V=0”,
which means that the volume is pulsing between its on state and off state and the L/R channels are left on
continuously. The third time this sound is shown in the movie, the LCD reads “F=0”, which means that the L/R
channels are pulsing between their on states and off states and the volume is left on continuously. In addition, in
all 3 cases shown, the SD_N pin is enabled (high) continuously. Note that the best result which most closely
matches what we had with the old obsolete part is the last, “F=0”, where the L/R channels are turned on and off.
We are wondering what about the part might cause the other 2 behaviors we observed? Is there
a soft start of the output going on inside the chip for changes in volume or L/R channels or SD_N or
combination of these inputs?
The following additionally events:
-
Even when using the last scheme (“F=0”), the first time that any audio plays even when delaying the on-time
of the L/R channels half a second after turning on the volume and the SD_N, there is still an initial
ramp of the volume level. After that it behaves as shown in the movie. -
Any change in level of the volume seems to have a similar result to that of turning volume all the way to zero
and back to its nominal value, therefore we are having to insert a delay any time the volume is changed -
A fourth combination of leaving the L/R channels and volume on continuously and only turning on and off the
SD_N pin has an even worse result (not shown in this movie)
Can you provide us any insight on this part? I can provide more details if needed.
Thank you
