TPA5050 Buffer reset

Hi, na,

1. Since there's no software or hardware reset for this device, the only way to reset the device is turning off the power supplies. This will put the device registers in default mode.

2. Unfortunately, we don't have a detailed block diagram. All the information about this device can be found in the device product folder.

Best regards,
Luis Fernando Rodríguez S.

Hi Luis

Thank you for your reply.

1. If power off reset is done, are there recommended power on / off sequence?

2. TPA5050 has buffer (shift register) for delaying data and we are assuming these registers have their own reset terminal.
    What is the condition of the buffer when the power off reset is done?

3. How long should we take for power off/on reset to clear these registers?

There is following description on the datasheet.

>BCLK is the serial audio bit clock, and it is used to clock the serial data present on DATA into the serial shift register of the audio interface.

If BCLK is not supplied (stopped), the data buffer for delaying would not be updated.  When BCLK is supplied again, previous buffered data would be garbage that is not needed. So, we must clear these buffer properly.

BestRegards

Hi, na,

The VDD pin supplies the necessary voltage and current to ensure that the buffer and registers will be configured. So, the power off reset is done while the VDD voltage is disabled. Ensure that the VDD voltage is less than the 0.3 * min voltage. I mean, make sure to have less than 1V. Wait for 10ms seconds to ensure that the registers and buffer are in default state.

Best regards,
Luis Fernando Rodríguez S.

Hi Luis

Thanks for your reply.

We can refer the default state of the control registers(0x01-0x08) but not buffer.

What is the default state of the IO buffer and Delay memory?
When the power off reset is done, the buffer all cleared with "0"?

And we want PoR sequence, could you please show us?

Thank you for your help.

BestRegards

Hi, na,

Memory and buffer are cleared in the same way. All the operation of the device is determined by the power supply. So, this means that if the power supply is removed, the internal functions are placed in default value (in case of buffer, it would be “0”). We just recommend to add a delay (10ms as I explained in e2e) to ensure that all the registers and buffer are placed in default state.

Could you give details about the PoR sequence? What do you mean with PoR?

Best regards,
Luis Fernando Rodríguez S.

Hi Luis

Sorry. My question was not clear.

We means PoR is Power on Reset.
We thought all function of TPA5050 is initialized by default value (Memory and buffer -> "0", Control register ->"default") when powering up.

Our thought, for example,

Powering up -> wait 10msec -> All function is initialized by default.

We understood memory and IO buffer in TPA5050 was cleared by removing power supply (less than 1V, right?). However, we didn't get when we should wait for 10msec.

Do you mean the recommended reset sequence is as follows?
If so, what is the meaning of waining 10msec? Discharging IC?

Powering Down -> wait 10msec -> After 10msec, Buffer and memory have "0" -> Powering Up -> Buffer and memory have "0", Control Register has "Default" state


Best Regards

Hi, na,

Effectively, you should wait for 10ms as you mentioned. This is to ensure that the device is completely discharged. So, the registers values will return to the default value.

The recommended reset sequence is the last one that you mentioned:
Powering Down -> wait 10msec -> After 10msec, Buffer and memory have "0" -> Powering Up -> Buffer and memory have "0", Control Register has "Default" state.

Best regards,
Luis Fernando Rodríguez S.