When using the TDM8 mode and paralleling up 4 PCM4222 ICs, do I require additional clock buffering per IC or can I just parallel these inputs?
I will use the front end circuitry from the EVM schematics which utilises the CLK source->buffer->divider path. So I'm asking if I need an additional buffers after this to isolate each clock input for the PCM4222
Thanks