Hello,
I have 2 questions regarding operating the DSD1792a in DSD mode:
- The datasheet stipulates that "The system clock can be removed after setting the register to the DSD mode" (Figure 40.):
Does this mean that the converter relies solely on DBCK to perform the conversion?
Do the same recommendations for SCK phase jitter and noise apply to DBCK then?
Is it OK to leave SCK on? Is there a preferred rate for it?
- Operating the chip in DSD and monaural, what is the best practice with the unused input DSD pin: ground it, leave it floating or connect it to the signal?
regards,
Alain