• State TI Thinks Resolved
  • Locked Locked
  • Replies 4 replies
  • Answers 1 answer
  • Subscribers 31 subscribers
  • Views 1563 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

DIT4096: the configuration of software mode

Gary Guo
Prodigy 240 points
Part Number: DIT4096

Hi TI audio expert,

      One of my customer is designing the DIT4096 in their system, they used the software mode. I have searched in TI website, I didn't found anything talking about the configuration of DIT4096 in software mode. So could you provide the configuration of this part? Thanks. I attached the schematic here for your reference. 

  • 0
    TI__Expert 5645 points
    Hi Gary,
    We do not have any example code for this device online. Having said that, I assume the customer is using DIT4096 to convert I2S to S/PDIF stream. I would benefit from detailed system requirements to recommend conif file for DIT4096 and SCH is not quite helpful. Please let me know more about the system requirements and we can help w. the config...

    Best regards,
    Ravi
  • 0 in reply to Ravi Patil
    TI__Prodigy 240 points
    Hi Ravi,
    Thanks for your respond. the customer want to convert the I2S to S/PDIF stream. and I don't know how to set the register to get it start. the MCLK is 12.288Mhz, and the LRCK is 48Khz. SCLK is 3.072Mhz. The output signal is transmitted by optical fiber.
  • 0 in reply to Gary Guo
    Prodigy 10 points

    I see the register in the specification book is 08~37. Can you help confirm that this is all the registers? What does the 00~07 need to set, the default 0 or the FF? If there are other registers, what is the value required to set up?

  • 0 in reply to user5263060
    TI__Expert 5645 points
    Hi Gary,
    I assume we have addressed this in a separate email thread. As discussed, we use registers 0x01 thro 0x07 to configure the device and rest of the registers are associated w. the channel status buffer for AES-3 encoder. Thanks.

    Best regards,
    Ravi