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SRC4194EVM: 2 pins available to drive master clock

Part Number: SRC4194EVM
Other Parts Discussed in Thread: SRC4194

I'm trying to use the SRC4194 eval kit in a mode where the SRC chip is acting as a slave on both the input and the output. I'm only using the port A, and the B port is unused.

I'm trying to drive in audio data via the I2S pins, and am reading it out via I2S pins as well. Both the input and output port pin headers have a pin for RCKIA. If both the driving and sampling devices connecting to these pin headers want to be an I2S master, how do I drive the 2 RCKIA pins?

  • Hi Mike,

    As far as the SRC4194 Serial port functionality is concerned, the audio data is received at the input serial port, clocked by the audio source device in Slave mode. In this case, the reference clock is only required for the rate estimator function. When both the input and output port are configured in Slave mode, the reference clock does not have to be a multiple of the input or output sampling rates. The maximum reference clock input frequency is 50MHz for RCKIA.

    Please refer to SRC4194 User's Guide - Srction 3.5 for detailed Reference clock gerneration.

    In short summary, the reference clocks may be derived by onboard PLL clock generators (U25 and U28), or by external clock sources applied at connectors J12 and J13. Hope this clarifies your query.

    Thanks & Best regards,

    Ravi