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Linux/TAS5733L: TAS5733L has no sound

Part Number: TAS5733L

Tool/software: Linux

Hello,

We are using TI chip TAS5733L to design a soundbar. But we have some problems to solve.

1. We read the device ID register: it shows 0x41, not the default 0x40.

2. After init the control register like the pic. And init sequence as the datasheet said. and We send the audio data with I2S, but the speaker no sound. we enable the TAS5733L, the output has PWM wave. But no sound.

Our circuit like this: 

8.2.2 Mono Parallel Bridge Tied Load Application

  • Hi Peng,
    Don't worry about the device ID - 0x41 is also good.
    Did you read the error status in the register 0x02? Is there any error triggered? Please clear that register by writing 0x00 before read it.
    How much is the input signal amplitude in dBFs? Did you try to enlarge the input amplitude and the AMP volume?
    What is the input I2S format? e.g. sampling rate, width... Make sure the data is valid on the positive edge of SCLK.
    If you could show us your SCH, it could help our debug work.
    Best regards,
    Shawn Zheng
  • Hi Shawn,

    Yes, we write 0x00 to reg 0x02 before read it. But it shows no error.  

    We use software to generate a wave, It works well on other audio pa. The sample rate is 32K/ 48K. 

    The schematic as below: PDN pin is pulled up by external resistor, RST pin is pulled down and controlled by a GPIO. R36 is 18K, not 0R

  • It is our normal init function we use.

  • Hi Peng,
    Could you please help to confirm the following two things:
    1. Can you see the PWM waveform on the AMP output pins? If not, please make sure that the I2C read/write operation is good.
    2. If PWM shows, please check the I2S format. How much frequency is MCLK/SCLK/LRCLK? Please help to invert the data valid edge on the SCLK to see if it works.
    Best regards,
    Shawn Zheng
  • Hi Shawn,

    Yes, I confirm it has the pwm waveform on Amp output pins. and we use AMP chip internal MCLK, SCLK=48K, LRCLK=48K*16*2= 1.536Mhz,
    But I have a question: As the datasheet
    7.6.2.2 I²S Timing

    It says: three i2s format: 64-Fs, 48-Fs, 32-Fs, we use 32-Fs, but there is no register to config it. Please tell me which register to select the i2s format.

    Thanks
  • Hi Peng,
    You don't need to configure I2S format, the AMP auto-detect the input I2S format.
    You have to apply MCLK from the front-end MCU/Codec to AMP, and the frequency should be in the range of 2.8224~24.576MHz.
    If MCLK clock is not available from your system, you could try to short MCLK pin to SCLK pin and use LRCLK=48kHz, SCLK=48k*32*2=3.072MHz format. In this way, the 3.072MHz clock is used for both MCLK and SCLK input.
    Keep in mind that external MCLK is necessary anyway.
    Best regards,
    Shawn Zheng
  • Hi Shawn,

    Thanks for your quick reply. I will try it as soon as possible and connect MCLK with SCLK together with 3.072M Clock.

    But in TAS5733L datasheet,  

    7.4.1 Clock, Autodetection, and PLL  

    The TAS5733L device checks to verify that SCLK is a specific value of 32 f S , 48 f S , or 64 f S . The DAP only
    supports a 1 × f S LRCK. The timing relationship of these clocks to SDIN is shown in subsequent sections. The
    clock section uses MCLK or the internal oscillator clock (when MCLK is unstable, out of range, or absent) to
    produce the internal clock (DCLK) running at 512 times the PWM switching frequency.
    The DAP can autodetect and set the internal clock control logic to the appropriate settings for all supported clock
    rates as defined in the Clock Control Register

    So it means the chip can work well without MCLK, because of internal osc clock, right?

    Thanks

  • Hi Peng,
    Internal OSC is not used for DAP, so the PWM is still there but the output sound stops when MCLK is stopped.
    Best regards,
    Shawn Zheng