Hi Officer,
I am just writing to ask what kind of peripheral components shall be put for pin VR_ANA.
The pin description on she datasheet shows that 'A 0.1-µF low-ESR capacitor should be connected between this terminal and AVSS_PLL. This terminal must not be used to power external devices.'
while the layout guideline on the datasheet provides such a schematic. I do not understand the components used between VR_ANA and PLL_FLTP, and those ones between PLL_FLTM and AVSS,
CAN you please help on this?
thanks,
Jim.