This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TLV320DAC3120: MCLK of TLV320DAC3120

Part Number: TLV320DAC3120

Dear expert,

Customer need your feedback about below question.

- Can we float SPKP/M if not used?

- If not use external MCLK, how to set the register?

Thanks!

Regards,

Ben

  • Hi, Ben,

    Yes, if SPKP/M are not used, they can be left floated.

    Regarding your question about the MCLK, the PLL and clock configuration are located in Page 0 / Register 4 ( Clock-Gen Muxing: http://www.ti.com/lit/ds/symlink/tlv320dac3120.pdf#page=58 ). In order to select another input clock, you would need to configure bits D1-D0 to use BCLK (01), GPIO1 (10) or PLL_CLK (11).

    If PLL_CLK is selected, you would need to configure bits D3-D2 too in order to select the PLL_CLKIN.

    I hope this is clear. Please let me know if you have additional questions or comments.

    Best regards,
    Luis Fernando Rodríguez S.