This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

OPA1688: OPA1688 thermal pad to ground

Part Number: OPA1688

Will/can it damage the device  if the thermal pad is tied to ground?  We are using the OPA1688 in the  8 pin WSON package powered from +/-12V.

  • Hi Daniel, 

    If I'm not mistaking, the thermal pad needs to be connected to V-. Setting it to GND would effectively short your negative supply to GND, and might damage the part due to the current that would be flowing through the part. I would not recommend doing this. 

    Regards,
    Vladimir

  • Vladimir,

    Thanks for your response.   However, the recommendation to tie the thermal pad to V- does not definitively indicate that the thermal pad is electrically tied to pin 3 of the device (v-)?   A hard short from ground to V- in my system does not result in a trip of the supply voltage monitor nor other problems associated with V- being distressed.

    I suspect that there is additional current draw by the OPA1688 and I suspect a thermal issue with this application.   

  • Hi Daniel, 

    My apologies, my initial statement was incorrect. You're correct in stating that there isn't a direct electrical connection between the thermal pad and negative supply (pin 3). A more accurate representation of the connection would be a Schottky diode, as you have a metal making contact with a semiconductor. Having the thermal pad tied to GND wouldn't necessarily damage the device, but there would be some leakage. The leakage may worsen with increase in temperature.

    Ideally, the thermal pad would be connected to V-, to keep the thermal pad at the same potential as the die substrate. 

    Please let me know if you have any further questions. 

    Regards,
    Vladimir 

  • Vladmir,

    Thank you for your more detailed response.   Is there any way to analytically quantify the magnitude of the leakage based on the substrate doping, etc...?   I am considering trying to experimentally trying to bound the maximum leakage expected at our expected maximum pcb temperatures. 

    We do plan to respin the pcb to correct this error, but I am trying to determine my expected additional component stress due to increase leakage/die temperatures.

    Thank you for your support.

  • Hi Daniel, 

    Let me consult the Design team on this. I am not certain that we'll be able to make an accurate analytical prediction, however, but I'll see what can be done. In the end, empirical data may be our best bet for quantifying leakage over temperature. 

    Regards,
    Vladimir

  • Hi Daniel, 

    I've discussed this issue with the Design Team at length. Basically, there's no way for us to simulate or analytically estimate the leakage in the 'Schottky' diode created by the device substrate and the metal underneath. Your empirical data, taken at maximum operating PCB temperature, would be the best predictor of this unwanted behavior. 

    I'm sorry I cannot be of more help. 

    Regards,
    Vladimir