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TLV320AIC3111: Issues regarding power consumption

Souvik Saha
Intellectual 625 points
Part Number: TLV320AIC3111

Hello,
I've been working on reducing the power consumption for the AIC3111 audio codec. According to the datasheet, the registers [0][60] and [0][61] are responsible for the power consumption settings for the codec. I've created the header file using PPS, with a sample rate 8kHz. My default configuration is

// # reg[0][60] = 0x40 ; DAC programmable mode, DAC miniDSP powered up even if DAC is powered down
{ 60,0x40},
// # reg[0][61] = 0x00 ; ADC programmable mode
{ 61,0x00},

What is the 0x40 setting? There isn't any such mode on the datasheet.

Currently, my audio source is MIC1LP and I'm using SPL, and HPL,HPR as output. My current consumption is in the range of 25-35mA. I'd like to minimize this value and I couldn't really understand the datasheet on this subject. Is there any other reference I could check out or guidelines I could follow?

  • 0
    TI__Expert 6440 points

    Hi Souvik,

    This bit is not documented in the datasheet. It keeps the DAC DSP running even when the DAC is turned off. It is useful in scenarios when an additional processor is required for processing ADC data. The data can be routed from the ADC DSP to the DAC DSP for processing and the processed output can be sent back to the ADC DSP. If you do not have any such use case, you could set reg[0][60] = 0x00.

    Best Regards.

  • 0 in reply to Diljith
    Intellectual 625 points

    How to choose the modes for reducing power consumption but providing the performance as per requirement?

  • 0 in reply to Souvik Saha
    TI__Expert 6440 points

    Hi Souvik,

    The first step would be to figure out the blocks that consume the most power. You can assess the contribution at analog and digital levels by measuring AVDD, DVDD and IOVDD currents separately. Then within each power domain figure out the power consumption of individual blocks by powering them off and measuring the difference.

    The device has built-in digital low power modes which are documented in section 2.3.3/2.4.1 of ARG. These are optimized ROM programs for various use cases. Please go through them and see if they are suitable for your application. In the case of RAM programs, algorithm or implementation optimizations may be required to reduce power. Reducing amplifier gain, powering off PLL or using integer multipliers, making sure blocks are powered off when not in use are some of the ways to reduce analog power.

    Best Regards.

  • 0 in reply to Diljith
    Intellectual 625 points

    What do you mean by RAM and ROM programs?

  • 0 in reply to Souvik Saha
    TI__Expert 6440 points

    The built-in PRB modes (PRB_P1, PRB_R1 etc.) are programs which are burned into the internal ROM of the device. I was referring to PRB modes as ROM modes. A resource class is associated with each mode that gives an indication of the power consumed by the device in that mode.

    By RAM mode, I refer to the miniDSP mode, wherein the program has to be written to the device's RAM using I2C.

    In addition, the device has a PowerTune feature which allows the user to trade power consumption against performance. These modes are referred to as PTM_Rn and PTM_Pn. The PowerTune feature is described in section 2.5.

    I hope this gives you sufficient information on begin exploring the power optimization options available on the device.

    Best Regards.