I am working with a product that supports both 48kHz and 96kHz frame rates. Due to constraints in my SoC clock tree, I can only configure to provide a SBCLK/FS ratio of 64. I am using 16 bit samples with 32sclk slot sizes. When running at the 96kHz rate (6.144MHz sclk) the DVC_PCM does not have any effect on the output. 48kHz behaves as expected with the output attenuating as I increase the value of DVC_PCM.
I also notice that the output increases when running at 96 vs 48.
Is this expected behavior? I have reproduced this with both the product and the TAS2770EVM-STEREO.