Other Parts Discussed in Thread: REG102
Hi,
I need some help to understand an issue regarding pll configuraton, especially the D value registers setting.
My problem is:
I cannot write into page 0/Register 5 (PLL Programming Register C). I read 0x00 whatever data I wrote.
Everything else seems to be OK: I can update all other factors without any problem (i.e P, R,J values), the pll is running but he 8 higher bits of D are always 0.
I am also aware that I need to update register 6 after writing to register 5.
Parameters:
MCLK: 24.576MHz
Desired Fs(ref): 8192Hz
P: 2
R: 2
J: 8
D: 1920 (0x780)
ADC Sample Rate Val (reg2) : 0xAA (ADC:10 DAC:10)
PLL Clock Divider N Value (reg102): N=8
Normally reg5&6 should have the following values:
reg5: 0x1E (0x78>>2)
reg6: 0x00
but after reading I have:
reg5: 0x00
reg6: 0x00
The Sampling frequency I get is 8000Hz instead of 8192Hz (which is coherent with J=0)
I've also tried many different values (between 0000 and 9999), but reg5 is always stuck at 0...
Regards,
Bruno