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TLV320ADC6140: Manual clock configuration in slave mode

David Snearline
Prodigy 40 points
Part Number: TLV320ADC6140


1. Does TI have any documentation for using the x140 series codecs with a 24 MHz master clock in slave mode?

2. In the register settings page, PurePath Console generates register values for Page 1 and Page 6.  Neither of these register pages are documented in the data sheet.  Does TI have any documentation as to what each of these registers are?

3. I understand from another thread that the document "TLV320ADCx140 Operation for Low-Power Critical Applications" has not been released yet.  Are draft versions of this document available?

Thank you.

  • 0
    TI__Mastermind 30220 points

    David, 

    1. When using a 24Mhz MCLK you can simply configure the ADCx140 in auto-clock configuration mode with PLL enabled.  See the application report "Configuring and Operating the TLV320ADCx140 as Audio Bus Master"  Section 2.1.1 is relevant. Note that on the EVM the GPIO is configured as an interrupt by default.  on the bottom side of the ADCx140EVM R2 needs to be removed, and R3 needs to be installed.  Or just remove R2 and use J13 as your MCLK input. 

    2. This is a bug in the software.  page 1 and 6 are reserved.  The bug in the software related to an issue with keeping track of registers that had non-default values.  these pages never should have been included in that routine and there were some errors in the default values for those page.  The most current version of the software should remove these,  however if you had created a file on an earlier version of the software, those page 1 and page 6 values are written into your file.   to get rid of these, I suggest creating a new file. 

    3. I will check into this.  in the meantime you can look at the application report "TLV320ADCx140 Power Consumption Summary" 

    best regards,

    -Steve Wilson