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PCM1808: Audio ADC outputs loud white noise + unable to set as master

Part Number: PCM1808
Other Parts Discussed in Thread: PCM1748

Hello all,

I recently bought a PCM1808 breakout board from AliExpress to get a head start on my university project. For the past week, I have been trying to interface with the PCM1808, to no avail. My first attempt was to use a Cyclone V FPGA to drive the ADC, and relay the audio data to a PC so I could make sure I was driving the ADC properly, but all I get out of it is very loud white noise.

My second attempt this evening was to use an ESP32, with the PCM1808 in master mode (256 fs), with pins MD1 and MD0 set at 3.3 V. This should set the BCK and LRC as output pins, but I am seeing no clocking signal come out of them.

I am beginning to think the chip I bought was a dud, or I have fried it in a way that it still half works.

I have attached images of the clock signals produced by the FPGA when I had it in that configuration. I am pretty confident that the signals are correct, and as you can see, the ADC is outputting data on the DOUT pin, although apparently it is just white noise.

For my University project, I plan to use two PCM1808 and two PCM1748, controlled by a Cyclone V FPGA that sits in the middle, doing audio mixing. It was my false belief that this project would be simple because it was just audio, and yet none of my University lecturers/technicians have never heard of an I2S bus.

The signals in the images are

Yellow - 12.288 MHz SCLK
Purple - 3.072 MHz BCLK
Blue - 48 kHz LR CLK
Green - data out

I2S Signals.zip

  • Hi Anthony,

    I can't really speak to the integrity of boards from AliExpress since we do not sponsor these developments. How are you analyzing the data output to correlate to the input signal you are providing? If you're not driving the inputs, then you will just see noise, but it should be quite low, near -93dBFS if you are driving near full scale input. You also need to pull FMT high or low to set the output format and ensure you are providing all of the necessary rails as it does not look like the AliExpress board generates any of them for you. 

    Your clocks don't look bad, but just be sure you have good ground connections to wherever you are sourcing your clocks. In master mode operation you should still be supplying the 12.288MHz clock if you intend to operate at 48kHz and SCK = 256Fs. This needs to be a high quality clock as well since there is no PLL on-chip. You also may want to double check that the digital logic levels between your ADC and FPGA match.

    Best,

    Zak

  • 2nd attempt - This time, I am now driving the PCM1808 SCK with my FPGA (12.288 MHz) while the ESP32 receives the PCM audio data.

    Still no luck though, as I am getting mostly noise that changes to slightly less noisy when I play audio via my connected smartphone, which is on the sending end of the 3.5mm audio jack. As by the diagram, the PCM1808 is in 256 fs master mode.

    At this point in time, I am concluding that something must be wrong with the PCM1808 chip itself, and will wait until I get another to replace it.

    The setup and scripts I am using to test the PCM1808 are attached, along with a snippet of the loud noise that I get out of it.

     PCM1808 Files.zip