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PCM1798 DAC low-power idle mode?

Gene Goff
Prodigy 20 points
Other Parts Discussed in Thread: PCM1798, PCM1792

We use the PCM1798 DAC and I would like to know if you hold the /RST input low, does the device go into a low-power mode where it draws negligible power from the analog and digital supplies?  If so, is there any data or explanation of this mode, as I don't see anything in the data sheet regarding any low-power modes.

  • 0
    TI__Guru**** 189399 points

    Hi, Gene,

    Unfortunately, we don't have any current measurements with the device in /RST mode.

    This device was designed for high-performance systems, and current consumption was not a big care-about.

    Even the s/w-controlled version of this doesn't have a power-savings mode.

    We have some DACs with power-savings modes, but at significantly reduced performance characteristics.

    -d2

  • 0 in reply to Don Dapkus
    Prodigy 20 points

    Okay, fair enough.  Thanks for looking into it Don.

  • 0 in reply to Gene Goff
    Intellectual 505 points

    Out of interest I tried measuring this as part of some other measurements I was doing regarding the PCM1792.

    The current that the analogue 5v rail draws remains roughly constant and changes only very slightly even when the sampling frequency increases, the power consumption is lower with lower sampling frequencies as you'd expect. The PCM1792 varied between around 30-33mA, so like I said not much change. This also didn't change when changing the state of the reset pin. You could obviously use a regulator that has a power down function and shut off the 5v supply if the DAC didn't need to be used.

    The digital 3v rail measured quite differently. It drew between around 25-60mA depending on the sampling frequency, again lower power for a slower sampling frequency. In this case however sending the reset low did reduce idle consumption, the current drawn for 48khz was around 28mA and sending reset low reduced this down to 20mA, not a huge difference but worthwhile anyway if power consumption is of importance. It also mattered what sampling frequency the chip was used at before sending reset low. For the lowest idle consumption you'd want to use the lowest idle sampling frequency offered by your system, followed by the reset pin going low.

    Also the active power consumption was lower when using low over sampling rates.