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Original question:

TLV320DAC3120: TLV320DAC3120 no speaker output

TLV320DAC3120: No Speaker output

Rahul Rai
Prodigy 40 points
Part Number: TLV320DAC3120

Hi All,

 There is a same issue of some Components. In Audio codec IC, There is no voltage at Speaker output (spkp1,spkM2,spkp2,spkM2).  I have checked with following commands:-

DAC Power,
1. sudo i2cset -f -y 0 0x18 0x00 0x00
2. sudo i2cget -f -y 0 0x18 0x25

And found that  In register 37,the 4th bit is not changing there value and it's shows class-D driver is not Powerup according to datasheet, & I2C,I2S ,BLCK,DAC_DIN, WLCK Communication with Processor is running fine . I have checked ,Pin Spkp1 with respect to ground  It's shows 0V. but in good audio  IC found that Spkp1 with respect to ground is 2.5V.

  I have attached Schematic of Audio IC & Register Configuration. 

1780.audio_schematic.pdf

registers Config.txt 
  Page 0
   0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f    0123456789abcdef
00: 00 00 01 66 03 91 08 00 00 00 00 82 88 00 80 80    ..?f???....??.??
10: 08 00 01 01 80 80 04 00 00 00 81 00 00 00 01 00    ?.?????...?...?.
20: 00 00 00 00 80 88 11 00 00 00 00 00 00 00 00 00    ....???.........
30: 2c 00 00 17 32 12 02 02 02 11 10 00 01 04 00 d4    ,..?2??????.??.?
40: 00 ec 00 00 2f 38 00 00 00 00 00 ee 10 d8 7e e3    .?../8.....???~?
50: 00 00 80 00 00 00 00 00 7f 00 00 00 00 00 00 00    ..?.....?.......
60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
70: 00 00 00 00 00 02 00 00 00 00 00 00 00 00 00 00    .....?..........
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................

                  Page 1
0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f    0123456789abcdef
00: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ?...............
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 04    ...............?
20: 06 3e 00 40 74 7f 80 7f 02 02 1c 00 20 86 00 80    ?>.@t??????. ?.?
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................

  • 0
    TI__Guru* 84915 points

    Hi, Rahul,

    Welcome to E2E and thank you for your interest in our products!

    Do you have the same results with no load connected to the TLV320DAC3120?

    In addition, I see that the page 1 / register 32 / bit D7 is not enabled. This is actually the correct bit that controls the Class-D output driver power. Could you try enabling it in order to see if there's Class-D switching activity at the outputs?

    Thank you.

    Best regards,
    Luis Fernando Rodríguez S.

  • 0 in reply to Luis Fernando Rodriguez S.
    Prodigy 40 points

    Hi Luis,

        

        1. There is a same result when no load is connected.

        2. For faulty audio codec IC, if we enable 'page 1 / register 32' D7 bit i.e Class-D output driver power shows 0 and not getting enabled.

    With Best Regards
    Rahul Rai
    VVDN Technologies Pvt Ltd
    Cell: +91 9667738712

  • 0 in reply to Rahul Rai
    TI__Guru* 84915 points

    Hi, Rahul,

    Is the I2C communication with the TLV320DAC3120 successful?

    If it is successful, then this should be associated to an output short-circuit event. Could you try with the following procedure?

    - Enable page 1 / register 32 / bit D7.

    - Wait 1 second.

    - Read page 1 / register 32. Is bit D7 enabled? Is bit D0 enabled?

    - Read page 0 / register 44. Is bit D7 enabled?

    Best regards,
    Luis Fernando Rodríguez S.

  • 0 in reply to Luis Fernando Rodriguez S.
    Prodigy 40 points

    Hi Luis,

      1. The I2C communication is fine.

      2. When I perform the short Circuit event in faulty Audio Codec IC. if we enable 'page 1 / register 32' D7 bit  then  'page 0 / register 44' D7 bit is not enable.

         For your reference I have attached the register dump of Faulty Audio Codec IC.

     

    bad_board_with_short_circuit.txt 
    Short circuit output with bad board .................register dump///////////////////////////////////
root@tegra-ubuntu:/home/ubuntu# 
root@tegra-ubuntu:/home/ubuntu# i2cset -f -y 0 0x18 0x00 0x00
root@tegra-ubuntu:/home/ubuntu# i2cdump -f -y 0 0x18
No size specified (using byte-data access)
     0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f    0123456789abcdef
00: 00 00 01 66 03 91 08 00 00 00 00 82 88 00 80 80    ..?f???....??.??
10: 08 00 01 01 80 80 04 00 00 00 81 00 00 00 01 00    ?.?????...?...?.
20: 00 00 00 00 80 88 11 00 00 00 00 00 00 00 00 00    ....???.........
30: 2c 00 00 17 32 12 03 02 02 11 10 00 01 04 00 d4    ,..?2??????.??.?
40: 00 ec 00 00 2f 38 00 00 00 00 00 ee 10 d8 7e e3    .?../8.....???~?
50: 00 00 80 00 00 00 00 00 7f 00 00 00 00 00 00 00    ..?.....?.......
60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
70: 00 00 00 00 00 02 00 00 00 00 00 00 00 00 00 00    .....?..........
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
root@tegra-ubuntu:/home/ubuntu# 
root@tegra-ubuntu:/home/ubuntu# 
root@tegra-ubuntu:/home/ubuntu# 
root@tegra-ubuntu:/home/ubuntu# 
root@tegra-ubuntu:/home/ubuntu# i2cset -f -y 0 0x18 0x00 0x01
root@tegra-ubuntu:/home/ubuntu# i2cdump -f -y 0 0x18
No size specified (using byte-data access)
     0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f    0123456789abcdef
00: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ?...............
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 04    ...............?
20: 06 3e 00 40 74 7f 80 7f 02 02 1c 00 20 86 00 80    ?>.@t??????. ?.?
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ...............

    With Best Regards
    Rahul Rai
    VVDN Technologies Pvt Ltd
    Cell: +91 9667738712

  • 0 in reply to Rahul Rai
    Prodigy 40 points

    Hi Luis,

          1. I also perform the short circuit event to Fine Audio Codec Ic. 

          2. When  we enable 'page 1 / register 32' D7 bit  then  'page 0 / register 44' D7 bit is not enable.      

              For your reference I have attached the register dump of Faulty Audio Codec IC.

       

    fine_Ic_short_circuit-0utput.txt 
    fine IC with short circuit ..register dump...................................................................................................root@tegra-ubuntu:/home/ubuntu# i2cset -f -y 0 0x18 0x00 0x00
root@tegra-ubuntu:/home/ubuntu# i2cdump -f -y 0 0x18
No size specified (using byte-data access)
                  Page 0

    0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f    0123456789abcdef
00: 00 00 01 66 03 91 08 00 00 00 00 82 88 00 80 80    ..?f???....??.??
10: 08 00 01 01 80 80 04 00 00 00 81 00 00 00 01 00    ?.?????...?...?.
20: 00 00 00 00 80 88 11 00 00 00 00 00 00 00 00 00    ....???.........
30: 2c 00 00 17 32 12 02 02 02 11 10 00 01 04 00 d4    ,..?2??????.??.?
40: 00 ec 00 00 2f 38 00 00 00 00 00 ee 10 d8 7e e3    .?../8.....???~?
50: 00 00 80 00 00 00 00 00 7f 00 00 00 00 00 00 00    ..?.....?.......
60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................                
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................                
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................                
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................                
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................                
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
                           Page 1 
root@tegra-ubuntu:/home/ubuntu# i2cset -f -y 0 0x18 0x00 0x01
root@tegra-ubuntu:/home/ubuntu# i2cdump -f -y 0 0x18
No size specified (using byte-data access)
     0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f    0123456789abcdef
00: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ?...............
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 04    ...............?
20: 06 3e 00 40 74 7f 80 7f 02 02 1c 00 20 86 00 80    ?>.@t??????. ?.?
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
           

  • 0 in reply to Rahul Rai
    TI__Guru* 84915 points

    Hi, Rahul,

    Thank you for the information you provided.

    I have additional questions.

    - Do you have the same problem if the unit is replaced by a new one? Do you have a failure ratio between different boards? I mean, have you had good results with different boards and ICs?

    - The only reason that the page 1 / register 32 / bit D7 is disabled is through an overcurrent issue. Could you try configuring page 1 / register 30 / bit D0 in order to keep the bit D7 unchanged even under short-circuit / overcurrent events? Could you double confirm that writing 0x80 in page 1 / register 32 is successful? 

    - Do you have the BCLK enabled on this application? Usually, the processing blocks require of some pulses to get initialized.

    - Could you double confirm that all power supplies are correctly applied on the device (checking the power pins voltage) and there are no shorts on any other schematic portion. As I mentioned, page 1 / register 32 / bit D7 should be enough to power up the Class-D driver.

    Best regards,
    Luis Fernando Rodríguez S.