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TAS5548: Dead time in AD modulation

Part Number: TAS5548


Hello,

Does the TAS5548 produce any dead time between PWM+ and PWM- signals when swtiching in AD mode. Can the PWM+ and PWM- signals be directly connected to the high side and low side drive of a half bridge without cross conduction?

There is information about modulation index in the data sheet, but none on dead time. A limit on modulation index does not guarantee dead time between PWM+ and PWM-. 

  • Hi Adam,

    First of all, the output of TAS5548 can't be connected directly to drive the half bridge, due to the limited current capability. Usually you will need a power stage like TAS56x4 series to accept the PWM logic inputs; or you can use gate drivers to drive the half bridge FETs.

    Secondly, I think in this topology, the general design is add the dead time or interlock control in the power stage, not the PWM modulator.

    Thanks!

    Regards,

    Sam

  • Noted. I will add the option for dead-time generation and interlock control to power stage.

    Using a driver for the power stage is a given, just trying to see what blocks are needed for pre-processing the PWM out of the TAS5548 into the power stage. We will not be using TAS56x4 stages as they are not capable of the target power output. The output stage will be discrete, and provisions for over current and voltage supervision are already accounted for.

    Would be nice to have detailed timing diagrams for the TAS5548 though.