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PCM1860-Q1: Supporting Fs=16kHz with system clock of 768fs in slave mode

Yoshikazu Kawasaki
Expert 3510 points
Part Number: PCM1860-Q1
Other Parts Discussed in Thread: PCM1860, PCM1861-Q1, PCM1863-Q1, PCM1862-Q1

Hello,

My customer was wondering how they should do for the existing system working at Fs=16kHz with system clock of 768fs in slave mode.  They'd like to use PCM1860-Q1 as it is without changing their SW, but it doesn't seem to support 768fs.  How would you say for this use case?  Do you have an IC supporting this use case?  Note that they prefer HW control.

One of the solution would be using external 1/2 divider for the system clock to make it 384fs from 12.288MHz to 6.144MHz if it doesn't support 768fs.  Do you think it works with PCM1860-Q1?  If it does, what do they have to check?  The datasheet just shows the Figure 3, but does it all they have to check for the timings?  I mean aren't there any timing requirements between SCKI and I2S pins?

SlaveModeTimingRequirements.docx

Best Regards,

Yoshikazu Kawasaki

  • 0
    TI__Mastermind 23050 points

    Hi Yoshikazu,

    PCM1860 does not actually require a system clock for operation as long as you are operating at frequencies greater than 8kHz. None of our HW controlled devices support a system clock of 768*fs.

    Best,

    Zak

  • 0 in reply to Zak Kaye
    TI__Expert 3510 points

    Hello Zak,

    Thank you very much for your quick reply.  OK, I understand there is no device working at HW controlled mode which supports 768fs.

    Please let me confirm again if PCM1860-Q1 really doesn't require system clock.  The datasheet on page 43 says "The PCM186x-Q1 family can be a clock master (where BCK and LRCK can be internally divided from a provided master clock) or can be a clock slave, where all clocks (MCK, BCK and LRCK) must be provided by an external source.".  The datasheet on the same page also says "The PCM1860-Q1 or PCM1861-Q1 hardware-controlled devices have the ability to detect an absence of MCK in slave mode and automatically generate a MCK signal.".  So I understand PCM1860-Q1 doesn't require system clock as you mentioned because PCM1860-Q1 can generate MCK signal by the internal PLL.  Please correct me if I'm wrong.

    Best Regards,

    Yoshikazu Kawasaki

  • 0 in reply to Yoshikazu Kawasaki
    TI__Expert 3510 points

    Hello Zak,

    I got additional questions.  Would you please answer these?

    1. How fast is the MCK generated by the internal PLL without external MCK input when it is slave mode at Fs=16kHz?

    2. When the system clock is absent, the internal MCK is generated by BCK from the figures on page 24 or 25.  Am I correct?

    3. The figure66 on page77 isn't for PCM1860-Q1, but can SCKI be left floating if not used like the figure?

    Best Regards,

    Yoshikazu Kawasaki

  • 0 in reply to Yoshikazu Kawasaki
    TI__Mastermind 23050 points

    Hi Kawasaki-san,

    Your understanding is correct, an MCLK is only required for operation at 8kHz. The internally generated MCLK is not available for output on the HW controlled devices and the exact rate it runs at will depend on sample rate and the BCLK/FSYNC ratio. It is generated from the incoming BCK, Yes SCKI can be left floating.

    Best,

    Zak

  • 0 in reply to Zak Kaye
    TI__Expert 3510 points

    Hello Zak,

    Thank you very much for your quick reply again.

    My customer will use BCLK/FSYNC=64.  In this case, would you please tell me the internal MCLK frequency?  If you have a table to show the MCLK frequency depending on the ratio of BCLK/FSYNC, that is helpful to control the EMI noise they may have.

    Best Regards,

    Yoshikazu Kawasaki

  • 0 in reply to Yoshikazu Kawasaki
    TI__Mastermind 23050 points

    Hi Kawasaki-san,

    I apologize for the delay, you can refer to table 12 for internally generated clock frequencies.

    Best,

    Zak

  • 0 in reply to Zak Kaye
    TI__Expert 3510 points

    Hello Zak,

    Thank you for your comments.  I understand the table 12 says PCM1862-Q1 and PCM1863-Q1, but it is also applicable for PCM1860-Q1.

    Best Regards,

    Yoshikazu Kawasaki