TLV320ADC3100: BCLK Frequency

Sadanori Kato

Part Number: TLV320ADC3100

Hi,

Could you please tell me whether TLV320ADC3100 can work normally if using TLV320ADC3100 in the following conditions?
In particular, I would like to know whether fs x 32 can apply to BCLK.

Conditions
- Master Mode
- MCLK = 24MHz
- BCLK = 1.536MHz(fs x 32)
- WCLK = 48kHz
- Data - 16bits

Best regards,
Kato

over 3 years ago

0 Diljith over 3 years ago

TI__Expert 6440 points

Hi Kato-san,

We can support 24 MHZ MCLK and generate the required FS and BCLK clocks.

The PLL and the device clock-tree configuration is shown below.

The BCLK can be generated from the ADC MOD CLK using a divider of 4.

Let us know if you have any further questions.

Best Regards.

0 Sadanori Kato over 3 years ago in reply to Diljith

Guru 36490 points

Hi Diljith-san,

Thank you for the information.

I understand.

Best regards,
Kato

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TLV320ADC3100: BCLK Frequency