Hello team,
Let me ask one question.
Can PCM5102A allow to change fs during constant frequency of SCK without stopping LRCK and BCK?
Best regards,
Koyo
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Hello team,
Let me ask one question.
Can PCM5102A allow to change fs during constant frequency of SCK without stopping LRCK and BCK?
Best regards,
Koyo
Hi Koyo-san,
When the SCK changes, the device will detect a clock error and go to a soft mute state. Once the LRCK/SCK ratio is valid again, it will unmute. This should not cause a pop noise or anything, just a simple volume ramp down then ramp up. It should not be a problem.
Thanks,
Paul
Hi Paul,
My question is SCK, LRCK and BCK are not changed but only fs is changed.
In this case, is there any issue?
Best regards,
Koyo
Hello Paul,
I'm sorry to rush you but customer need an answer by today.
Your answer is when SCK is changed but my question is when fs is changed.
Best regards,
Koyo
Hi Koyo-san,
When the LRCK clock changes there will likely be a synchronization error (clock error). This will result in the same mute state until the clocks can re-synchronize. It should not generate any pop noise.
Thanks,
Paul
Hi Paul,
Thank, it was my misunderstanding.
But let me ask, can I understand SCK=LRCK or BCK?
Sometimes MCK is represented as SCK so I want to make sure.
MCK is fixed in this case.
Best regards,
Koyo
I have seen SCK used for multiple clock names in the past. In this case I used:
LRCK = fS = sample clock (e.g. 48kHz)
BCK (bit clock) = fS×64
SCK=MCK= system clock = fS×128 or fS×256 or fS×512, etc.
Thanks,
paul