PCM1803A: I can't reach Dynamic range 103dB.

Hello,

The typical dynamic range of the PCM1803A is 103dB, but the minimum is actually 100dB.  Therefore it is possible to receive units with performance that is slightly higher than the datasheet typical specification of 103dB, and it is also possible to achieve lower performance between 100dB and 103dB.  

Are the inputs being shorted before the AC coupling capacitors and would you confirm that A-Weighting filters are being used?

Thank you for your reply.

I confirmed with A-weight filter. But I can get only 100dB Dynamic range.

And I shorted before the AC coupling capacitors.

Now I don't have next idea for improving...

Hello,

Thank you for the additional information.  Would you share your schematic and layout with us for review?  Also, is this occurring on one, several, or all of the current production units, and has the performance been better in the past?

Thank you.

This problem happens at all of the current products.

And I don't have used this PCM1803ADB before. (This is first case for me.)

I share schematic and PCB layout below.

[Schematic]

[Top layer of PCB layout]

[Bottom layer of PCB layout]

It's difficult for me to share schematic and PCB layout because of maybe large data size.

If you know, could you tell me how to share to you?

One more question.

Does anyone tell me the relation between the waveform of SCKI, BCK, LRCK and Dynamic range spec.

Ex. nearer to rectangle the waveform of SCKI is, the better Dynamic range is... and other...

Hello,

The images did not make it through properly, but I believe they've been provided to us by your local TI FAE support team.  

Would you confirm you've tried testing the design with an Audio Precision analyzer with good connections to the device under test?  

If waveform rounding is great enough to impact the jitter performance, then SNR will be impacted as well.  Similarly, if the clock sources jitter performance is not good then the SNR will also be impacted.  

Thank you.

I sent the schematic, PCB layout and waveforms of clocks and data to Mr. Nagata in Japan.
Do you have received them from him?

Hello,

Yes, Nagata-san has delivered us the most recent information and screen grabs.  We will work this thread offline through e-mail and then will post back here anything worth sharing about the resolution.

OK. Thanks.

I noted.

Hello,

I will post my last response to Nagata-san here as well so you see it in both places:

The waveforms the customer shared with us look proper and while it’s not possible to verify the possible jitter on the clocks from the waveforms, they generally look okay. It’s hard to determine if all of the rounding on the MCLK signal is from the scope probe, but if could they remove the snubber network (R1183 and C1187) on the MCLK line to see if the SNR changes? We usually recommend a small series resistor versus a snubber, but customers are the experts in these things generally and it’s probably done for a reason. 

Our only other thoughts on the reduced performance would be the possible distortion from the input capacitors. Does the THD+N improve at all by increasing the frequency to 5-10kHz? The effects of input capacitors should be gone at those frequencies and if the performance continues to degrade as the frequency decreases this could be an effect. Here is a good article on these effects: https://www.ti.com/lit/an/slyt796/slyt796.pdf 

Lastly, we’ll reiterate again that the minimum spec is in fact 100dB and it is possible to receive units that are performing below the 103dB typical specification and closer to the minimum specification. This should not be all units, but units in a particular batch may operate similarly.

About the waveforms of MCLK, I already have tried your idea that is to remove the snubber network (R1183 and C1187). But the performance was not improved. (Sorry, I didn't capture the waveform without the snubber network.)

And I've got PCM1803As of other lot than I've first tested from Mr. Nagata.
I have tried above chip, but the performance was not improved......

I've checked the THD+N at between 5-10kHz, but value didn't change.

I'll check the e-mail from Mr. nagata, later. Thank you.

Thank you for confirming the tests had already been performed.

We're a little stumped on this one at this point and will be working to set up some experiments on our side to try to verify the results. Any other useful information you have would be helpful to try to figure this one out.

Thank you for your next confirmation.

I'm looking forward to hearing your new information.

Hi,

Can you confirm what sample rate you are operating the device at? I have set up an old EVM and found that the device performs best at 44.1kHz and there is actually a few dB of degradation when running at 48kHz. I measure around 102.5dB SNR when running at 44.1kHz and just under 100dB when at 48kHz.

Best,

Zak

Thank you.

I noted.

Are there ADC devices that has same function and same pin assign as PCM1803A and has higher dynamic range spec?