Hello,
I'm writing firmware to control a PCM5122 DAC mounted on a custom development board.
When I play a 15kHz sine wave sampled at any sampling rate, the DAC output waveform looks surprisingly jagged (photo below).
Here are some details about my setup:
-The DAC circuit schematic is the one from Figure 75 in the PCM5122 datasheet, including the RC filters on the output lines. Beyond the essential components, a 24.576MHz clock IC is available to generate SCK in master mode configuration.
-The I2S and I2C signals are generated by a microcontroller dev board (Teensy 4.1)
-The jagged waveform appears in both I2S slave mode with PLL configured, and in I2S master mode with the external clock source.
Is this the expected output of the PCM5122 without an additional output stage to filter the signal? Or is something misconfigured?
Thank you!
-Josh