Hi team,
Could you advise the typical and maximum supply current for Iavdd/Ibstvdd/Iiovdd under the condition below?
Mode : slave mode
fs = 384kHz
BCLK = 64 x fs
MICBIAS = 9V (AC-coupling) @Rext=4.7kohm
I2C bus
regards,
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Hi team,
Could you advise the typical and maximum supply current for Iavdd/Ibstvdd/Iiovdd under the condition below?
Mode : slave mode
fs = 384kHz
BCLK = 64 x fs
MICBIAS = 9V (AC-coupling) @Rext=4.7kohm
I2C bus
regards,
Hi Shinji,
Give us some time to look into this - will try to have an answer for you by your Thursday morning the 25th.
Hi Shinji,
We don't characterize the device under these exact conditions but with 2 channels at 384kHz, 3.3V supplies, BCLK/FSYNC = 48, and linear phase filters the AVDD current is typically ~20.3mA and the IOVDD current can be up to 952uA.
Best,
Zak
Hi Zak,
In order to determine the supply capability of the regulator, how much margin should I take?
x2 (around 40mA) is safe margin?
regards,
Hi Shinji,
This is a design decision your customer needs to make as derating requirements may differ. I would suggest at least 2x margin, but if the same supply is powering the BSTVDD pin then the current will need to be higher.
Best,
Zak