Audio forum - Recent Threads

TAS67524Q1EVM: TAS67524Q1EVM reference design files

Jai A — Thu, 25 Jun 2026 13:37:16 GMT

Part Number: TAS67524Q1EVM

Hi,

Would you be able to share the design files for the TAS67524Q1EVM?

Is there any other device you can suggest that works with TDM16?

PCM5102A: PCM5102A SCH confirmation

Vayne Li — Thu, 25 Jun 2026 10:28:44 GMT

Part Number: PCM5102A
Other Parts Discussed in Thread: OPA1678

Hi Teams,

The customer is using PCM5102A to develop an audio circuit for a companion robot. Please help confirm if the schematic design is reasonable and provide suggestions. Thank you.

31_VI_Speaker.pdf

PCMD3140: PCMD3140 SCH confirmation

Vayne Li — Thu, 25 Jun 2026 10:25:58 GMT

Part Number: PCMD3140

Hi Teams,

he customer is using PCMD3140 to develop an audio circuit for a companion robot. Please help confirm if the schematic design is reasonable and provide suggestions. Thank you!

35_VI_MIC.pdf

NE5532A: Maximum output voltage swing

Mochi — Wed, 24 Jun 2026 14:19:40 GMT

Part Number: NE5532A
Other Parts Discussed in Thread: RC4580, NE5532

Hello,

Our customer has curiosity on the Revision K datasheet matter of the "Removed Maximum peak-to-peak output voltage swing" specification.

Now NE5532A does not have any specification of output voltage swing, how can they secure output signal performance on Mass production EE.

We have seen another E2E thread that RC4580 and NE5532A are using the same silicon die.

RC4580 specified as "VCM Output voltage swing RL 2kohm ±12 ±13.5 V", so NE5532A might have the same specification on this.

Will you add this number to NE5532A datasheet?

Regards,

Mochizuki

TAS6684-Q1: Power Dissipation Calculation

Amirthathaarani S — Wed, 24 Jun 2026 13:43:54 GMT

Part Number: TAS6684-Q1

Hi TI Team,

I am currently calculating power dissipation for TAS6684-Q1,

Requirements:

Supply voltage: 12V
Number of channels: 4
Output power: 4 x 15 W, 4 ohm
Automotive qualified

Based on Figure 5-50, I estimated the dissipation at 60 W total output power (4 × 15 W) to be approximately 8 W. Is this the correct approach for thermal calculations?

Also why do automotive Class D amplifier datasheets and calculations often use 14.4 V as the supply voltage instead of 12 V? Is 14.4 V coming directly from the alternator or from a DC-DC converter?

Thanks in advance.

TAS6424E-Q1: Power Dissipation Calculation

Amirthathaarani S — Wed, 24 Jun 2026 13:43:51 GMT

Part Number: TAS6424E-Q1

Hi TI Team,

I am currently calculating power dissipation for TAS6424E-Q1,

Requirements:

Supply voltage: 12V
Number of channels: 4
Output power: 4 x 15 W, 4 ohm
Automotive qualified

For a 4 × 15 W, 4 ohm application (60 W total output power), I estimated the TAS6424E-Q1 power dissipation from Figure 7-8 to be approximately 10 W using the PVDD (Device only) curve. Is this the correct approach for estimating device power dissipation for thermal calculations?

Thanks in advance.

TAA5242: About the Signal-to-Noise Ratio

Ryu Yamashita — Wed, 24 Jun 2026 13:08:38 GMT

Part Number: TAA5242

Hi team,

Is it correct to understand that when operated in single-ended mode, the SNR is reduced by 6 dB from the value stated in the datasheet?
Also, does the SNR change with the sampling frequency when used in differential mode and when used in single-ended mode, respectively?

Best Regards,

Ryu.

TAS2563: Usage of Voltage and Current Data from TAS2563 TDM TX

Kyosuke Watanabe — Wed, 24 Jun 2026 10:46:08 GMT

Part Number: TAS2563

I understand that voltage and current information can be output from the TAS2563 via TDM TX (SDOUT).
Could you please clarify how the receiving side is expected to use this information?

AM62D-Q1: Loopback on AM62D-EVM board

shun yao — Wed, 24 Jun 2026 09:46:12 GMT

Part Number: AM62D-Q1

Hello Support Team,

I am trying to set up a loopback test between McAsp ports with a AM62d-EVM board.

The idea is to use one McASP to send out TDM 2slots signals and use another McASP to reveive the signal.

I am doing development on the Rx part, so I would like to enable the Tx with minimum effort.

The target OS is linux and the Rx McAsp has a non-TI driver.

So my question is:

Is there any limitation for choosing which McAsp ports can be used for loopback?
Is there any tool to configure a McAsp port to send out TDM-2 signal?

Thank u for ur support!

TPA3100D2: Can I connect NC pin to GND?

Yuxi Liu(Tony) — Wed, 24 Jun 2026 09:41:28 GMT

Part Number: TPA3100D2

Hi TIer

Could you help me check if I can connect the NC pin to GND?

Thank you very much.

TPA2025D1: TPA2025 -VBAT pin is left floating

switch — Wed, 24 Jun 2026 03:32:57 GMT

Part Number: TPA2025D1
Other Parts Discussed in Thread: TPA2011D1

Hi ti team,

We are using the TPA2025 in our new project and have encountered a technical issue that we need to consult about. Our design does not utilize the internal boost function of the TPA2025; the VBAT pin is left floating, and the device is powered via PVDD. Under this configuration, we measured an excessively high quiescent current. Could you please advise whether the VBAT pin can be left floating? Additionally, we replaced the inductor with a ferrite bead in the circuit.

TAS2574EVM: TAS2574 PPC3 OCP Latch and missing features

Doug Peeler — Tue, 23 Jun 2026 20:09:41 GMT

Part Number: TAS2574EVM
Other Parts Discussed in Thread: TAS2574

I am running into issues where the TAS2574EVM is succesfully playing back audio but with certain peak dynamic content, it Latches and needs to be reset for playback to funciton again. I've Read the registers and found that the OCP has been triggered. I am still adjusting settings of the Channel Gain and Boost functions, but found a discrepancy in the EVM User's Guide and what I'm actually seeing in the PPC3 console.

1 - Any guidance on how to optimize Channel Gain/Boost settings? The application is a 10Wavg rated loudspeaker that can handle plenty of peak power but the application is a battery operated (1S) that will be running off a 5V rail. I've measure voltage output when the Latch happens and it's not even crossing 4V.

2 - How do I make sure my board is actually being read by PPC3 as the TAS2574? The user's guide states there is a Over Current Retry but it doesn't show up in PPC3.

Below is the info on what I'm seeing in PPC3.

PCM1863: SIGDET_LOSS_TIME inquiry check

Will Wang47 — Tue, 23 Jun 2026 13:54:42 GMT

Part Number: PCM1863

Hi team,

My customer is using PCM1863, they get one question regarding the SIGDET_LOSS_TIME. In the datasheet, it shows in the register setting, the minmum time is 1 minutes. While customer think this is still too long for them, they want to check if the time could be ~10s level.

Could you help check if this is workable in PCM1863?

Regards,

Will

RC4580: The batch defect for RC4580

Zhang Liang — Tue, 23 Jun 2026 13:41:36 GMT

Part Number: RC4580

Hi,

Our end customer feedback the RC4580 has the quality issue and the Impedance comparison test as below form, please kindly check if there are any same issue for the chips from the same batch for the other customer ,thanks.

PCM3010: HOW TO CONNECT STEREO LINE OUT AUDIO TO MIC INPUT

Srilakshmi H — Tue, 23 Jun 2026 11:52:02 GMT

Part Number: PCM3010

We wanted to connect Stereo Line out audio to the BT module Mic input,
Can you please guide how to convert the Line level audio to Mic level here?

TAS2320: Understanding the datasheet gain parameters

Luke Sakamoto — Tue, 23 Jun 2026 09:00:50 GMT

Part Number: TAS2320

Hi team,

This family of IC has external pin control.

It says 12dBV, but what is the detail of this. Is this the output voltage swing when internal digital volume at 0dB and input is 0dBFS?

Thanks,

Luke

TAS5782M: MCLK lose and recover behavior

Toshiro Imi — Tue, 23 Jun 2026 07:05:06 GMT

Part Number: TAS5782M

Hello,

Our customer has questions regarding to TAS5782 MCLK lose and recover case, configured 4 wire hard ware connection with register setting SREF=0x10 (The PLL reference clock is oscillator clock), IDSK=0x01 (Ignore MCLK detection), IDCH=0x01 (Ignore MCLK halt detection), DLRK=0x18.

In this configuration, he faced on an issue of audio out mute at the moment of external MCLK loose then recovered after that. And same thing was happened at the moment of external MCLK recovered.

Q-1 : Even if he sets PLL is referenced to oscillator clock, TAS5782 works by external MCLK input if it applies ?

Q-2 : Once external MCLK loose, PLL clock switches to oscillator clock ?

Q-3 : Does the audio output mute issue come from the system clock (or PLL reference) switches to or from either oscillator clock or external MCLK ?

best regards

TS12A12511: Audible Tick/Pop While Switching TS12A12511 in Audio Signal Path

Falguni Sharma — Tue, 23 Jun 2026 05:23:30 GMT

Part Number: TS12A12511
Other Parts Discussed in Thread: PGA2311, TPA6120A2, OPA1612, OPA1622, TLV320AIC3104

Hi Team,

I am using the TS12A12511 analog switch in an audio signal path and am experiencing an audible tick/pop whenever the switch changes state.

Signal chain:

TLV320AIC3104 → OPA1622 → OPA1612 → PGA2311 → TPA6120A2 → TS12A12511 → Receiver

The TS12A12511 is used to connect/disconnect the receiver output. The audio functions correctly after switching, but a short audible tick/pop is heard at the instant the switch changes state.

Observations:

PGA2311 volume is reduced to minimum before switching.
Approximately 10–15 mV DC offset is present at the TPA6120A2 output.
A small DC offset is also present at the PGA2311 output.
The tick is still present even when the audio signal is muted before switching.

My questions are:

Is 10–15 mV DC offset sufficient to generate an audible pop when switching a low-impedance receiver?
Could this behavior be due to charge injection from the TS12A12511?
What is the recommended method to eliminate switching clicks/pops in this type of audio application?
Are there any recommended TI analog switches or audio muting circuits better suited for click/pop-free audio switching?

Any guidance would be appreciated.
**Switch schematic is attached below.

Thank you,
Falguni Sharma

TAS5825M: TAS5825 in PBTL mode (post-filter)

Zachary Darf — Tue, 23 Jun 2026 00:51:54 GMT

Part Number: TAS5825M

My board design has exactly copied this stereo BTL schematic from the TAS5825 datasheet:

However, I need to use the amp now in PBTL. Seems to me the easiest way to do this (avoiding modifying the board) is to use a "post-filter" architecture. While this use-case is not documented in the data sheet, I do see this is supported (from the related E2E post entiteled "TAS5825M: PBTL operation output configuration".

Furthermore, I'm looking to verify the process before I start plugging things in. Can you address the following questions:

1. Is post-filter PBTL mode supported with the TAS5825 amplifiers without any modifications to the stereo BTL circuit diagram?

2. If so, should the connections between amp and speaker be as follows (+ speaker terminals connected together, - speker terminals connected together)?

OUTL+, OUTR+, Speaker+ is Node1

OUTL-, OUTR-, Speaker- is Node2

3. In PurePath, the speaker configuration should be the "Mono 1.0 PBTL"?

Thanks,

Zach

[FAQ] TAS2120: What are the proper considerations when driving a high-inductance actuator with TI Class-D amplifiers?

Ivan Salazar — Mon, 22 Jun 2026 19:15:12 GMT

Part Number: TAS2120

When driving high-inductance actuators, the phase shift of current and voltage in the load can cause reverse-current issues triggering Class-D amplifier protection schemes such as over-current and over-voltage.

The attached spreadsheet can be used to calculate the minimum capacitance required on the PVDD or main voltage supply rail when driving such actuators to prevent audio output interruptions.

For more information refer to www.ti.com/.../sdaa430.pdf

Reverse-current-minimum-capacitance.xlsx

TAC5212EVM-K: CTIA Mic input on J35, IN1M or IN2M - jumper settings at TAC5212 IN1P/IN1M or IN2P/IN2M

Stephen Kertesz — Mon, 22 Jun 2026 18:12:36 GMT

Part Number: TAC5212EVM-K
Other Parts Discussed in Thread: TAC5212

Having difficulty deciding how to configure the jumpers and which mode to use for a CTIA headset mic connected at J35.
Any suggestions?

The routing of only IN1M/IN2M from jumper J30 doesn't seem to align with any of the available input modes.

For example, I was attempting single ended AC-coupled and I can see a jumper option to connect IN1M to IN1P, but how to connect IN1M at the TAC5212 to GND?
Can it be done internally by the TAC5212?

Or is another mode a better option?

PCM1809: Regarding the handling of unused pins when using only one channel of the PCM1809

Kyohei — Mon, 22 Jun 2026 07:39:53 GMT

Part Number: PCM1809

Hi team,

The PCM1809 is a 2-channel ADC. If only one channel is used, could you please advise on the recommended handling of the unused channel pins?

We assume that the analog input pins should be connected to a stable reference potential to prevent unwanted noise or instability. Therefore, we are considering connecting the unused analog input pins to a reference voltage such as VCOM.

Could you please confirm whether this is the recommended approach, or advise on the proper treatment of the unused pins?

Best regards,

Kyohei

TPA6133A2: Regarding the output lines of the TPS6133A2

Kyohei — Mon, 22 Jun 2026 07:30:36 GMT

Part Number: TPA6133A2

Hi team,

For pins 11 and 14, which are the output lines of the HPAMP IC, would it be acceptable to leave them without any pull-down resistors or other stabilization components for startup?

Based on the EVM schematic, it appears that no pull-down resistors are implemented on these lines, so we believe there should be no issue. Could you please confirm if our understanding is correct?

Best regards,

Kyohei

TLV320AIC3254: TLV320AIC3254: output signal inverted

Patrick Gautschi — Sat, 20 Jun 2026 07:22:55 GMT

Part Number: TLV320AIC3254

I'm using a TLV320AIC3254 for a low power mono signal processing: Analog in -> ADC -> DAC with BiQuad -> analog out.

At my current experimental state, I do not set the filters. When looking at the output signal, it is inverted with respect to the input signal. I do not understand why. Could someone explain this?

I'm aware that the LO gets inverted with respect to the HP when both LO and HP are used. My issue is for the case when only one of the output is enabled. When both are enabled, the HP is inverted and LO is not. The mysterious inversion is not caused by the inputs. I checked this by not routing the DAC to HP but MAR instead.

I tested with a 25% DC rectangle signal to make the output unambiguous regardless of any phase shift or delays.

PS: I actually would like to have a differential Line-Out signal but this is not possible as far as I understand the chip. PRB_P16 is using the left DAC and diff output is only possible with the right channel. Or do I miss something?

This is my current script/configuration: init.txt

TAS6584-Q1: What Reference Design is for EMI Compliance Testing?

Levi Rakes — Fri, 19 Jun 2026 12:08:11 GMT

Part Number: TAS6584-Q1

Good Day,

I have a few different sets of board files for reference designs and validation baords etc...

Were the TIDA-020033E2 files the ones used for compliance testing?

Thank you!

Levi Rakes