https://e2e.ti.com/support/audio-group/audio/<p style="display:none;">blank</p>en-USTelligent Community 13https://e2e.ti.com/support/audio-group/audio/f/audio-forum/1675666/tac5212-jack-detect-with-tac5212-with-receptacle-switches/6462205Tue, 25 Aug 2026 17:14:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:c5561770-74a9-4b40-8e75-6bc5026002d4Garret GodfreyHi Marcell, I think it will be fine. I suggest to configure ADC CH1 as single-ended MUX as opposed to true single-ended, to deal with switching between the common mode or differential minus signal at IN1M: You could also AC-couple the input pins if the common mode is a concern. Best, Garrethttps://e2e.ti.com/support/audio-group/audio/f/audio-forum/1676196/tas2781evm-tas2781-evm-outputs-loud-noise-instead-of-normal-audio-after-writing-ppc3-generated-cfg-via-i2c-tool/6462020Tue, 25 Aug 2026 14:52:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:fd441a24-40b6-4833-8264-494ebfe7ed27Shenghao DingOur expert will feedback you shortly.https://e2e.ti.com/support/audio-group/audio/f/audio-forum/1675754/pcm6240-q1-short-to-batt-fault-diagnostic-issue/6461932Tue, 25 Aug 2026 13:46:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:7306502a-085b-496a-beff-1c081df1cdbaGarret GodfreyHi Yaqian, Yes, sorry this is an internal forum where I am having the discussion on your issue with our field team. What is the VBAT voltage in the system? Can you scope VBAT and MICBIAS in two cases - when the IN1P is short to VBAT, and when the short is disconnected? Thanks and Best, Garrethttps://e2e.ti.com/support/audio-group/audio/f/audio-forum/1676288/purepathstudio-adc5120-evm/6461914Tue, 25 Aug 2026 13:34:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:7dd76ca9-973f-443d-a377-7e5931556935Garret GodfreyHi Pedro, Please request at this link: https://www.ti.com/secureresources/ADCX120EVM-SW Best, Garrethttps://e2e.ti.com/support/audio-group/audio/f/audio-forum/1675807/pcm5121-about-tdm-timing-spec-for-pcm5121/6461912Tue, 25 Aug 2026 13:33:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:daeac1ef-2541-45f7-a2f1-13acf26e8c13Arash LoloeeHi G,W For some reason this table was missed in datasheet for PCM512x, but they have the identical specs as the other parts in this family namely PCM5102 or PCM5242, It was asked before in this post as well: RE: PCM5121: I2S Timing Requirements Kind Regards, Arashhttps://e2e.ti.com/support/audio-group/audio/f/audio-forum/1676404/am2752-q1-support-on-selecting-parts-for-a-new-professional-speaker-amplifierTue, 25 Aug 2026 13:23:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:e9d6cf90-f1cb-4c41-9018-280aea0e4f1fKrzysztof CieniawskiPart Number: AM2752-Q1 For a new professional speaker amplifier project we are looking for core components. ADC for analogue input signal. DAC for driving amplifier, DSP for audio signal processing and Application core for system management. Whereas ADC and DAC should be at least 24bit/48kHz with minimal SNR, there are higher requirements for the DSP and application core. We would like to have single SoC solution including DSP and application core with AVB 1 GBit ethernet. Optionally DSP and application core can be also spitted into two separate chips. Could you help us with suggesting the best components. Do you have solutions that can support ethernet audio redundancy by connecting two ethernet audio cables?AM2752-Q1https://e2e.ti.com/support/audio-group/audio/f/audio-forum/1675777/purepathstudio-denied-access/6461876Tue, 25 Aug 2026 13:04:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:77c583bd-5225-4a5d-8afb-7184ba88dc78Arash LoloeeHi Nadun, I am not the approver. Yesterday I asked about your request from one of the approvers and she informed me it was approved. If you have any new request, you have to put a request for it and the appropriate team will take care of it. E2E is separate. Kind Regards, Arashhttps://e2e.ti.com/support/audio-group/audio/f/audio-forum/1676128/pcm1802-pcm1802-fsync-pin-behavior-in-slave-mode-when-replacing-pcm1803a/6461856Tue, 25 Aug 2026 12:51:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:fa9f1a2d-a5b3-4d0d-bfb4-2abbb2310bd4Arash LoloeeHi Ryu, In slave mode, the user has to provide FSYNC ( sampling clock) and of course BCK, and this is the case for any part in slave mode. It will not work if sampling clk is not provided or grounded or it is not as expected by the I2S protocol. So connecting FSYNC to GND or not connecting it and expecting the part to work in Slave mode is out of question. Regards, Arashhttps://e2e.ti.com/support/audio-group/audio/f/audio-forum/1675807/pcm5121-about-tdm-timing-spec-for-pcm5121/6461824Tue, 25 Aug 2026 12:21:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:64f831cc-d88c-4a18-9925-b0022244c282GWHi Arash As mention before, Could i help to share the PCM5121 timing requirement for TDM signal integrity specs? Thanks. G.Whttps://e2e.ti.com/support/audio-group/audio/f/audio-forum/1675630/tac5212-tac5x1x-linux-driver-device-tree-yml-doesn-t-have-a-config-for-out1x/6461794Tue, 25 Aug 2026 12:02:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:28b953a3-6b1d-4ae9-aca5-a1cd91bd98e3Niranjan Holalu YogendraThanks for the confirmation. I will come back on towards end of this week. thankshttps://e2e.ti.com/support/audio-group/audio/f/audio-forum/1671695/tac5212-linux-driver-for-6-6-kernel/6461789Tue, 25 Aug 2026 11:59:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:e7392b68-a56e-4d13-bc6c-f636225d475aNiranjan Holalu YogendraHi De Bug 1] You&#39;re right that TAC* and TAD* are using the TAA* which needs a fix. I will fix it in upcoming changes. Thanks for pointing out. I am not sure how it is related to platform driver / machine with PLL. Need to check with the respective machine driver. 2] In case of multiple codec use cases ( e.g. 2 x taa5212 ) to have unique DAI names. 3] I am not sure where is this extra 0 is coming from. I am guessing this is DAI ID ? Did you have &#39;#sound-dai-cells&#39; = in the device tree, if yes perhaps setting it to &#39;0&#39; should make it go away ?https://e2e.ti.com/support/audio-group/audio/f/audio-forum/1676363/tas6424-q1-4x2ohm-btl-operation-feasibleTue, 25 Aug 2026 11:46:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:27a93080-b177-4092-ab9e-06e579dfb856Isabel EpplePart Number: TAS6424-Q1 Other Parts Discussed in Thread: TAS6424 We are currently using the TAS6424 in our project. 4 loudspeakers are connected to one amplifier chip. Only two channels of each chip are approved for 2 ohm speakers though. What would have to be done here to support 4x2Ohm on a chip? In the data sheet I see only 4x4Ohm BTL or 2x2Ohm PBTL - not our current system 2x4Ohm+2x2Ohm BTL. Would a 4x2Ohm BTL operation be feasible?Infotainment &amp; ClusterTAS6424TAS6424-Q1https://e2e.ti.com/support/audio-group/audio/f/audio-forum/1671695/tac5212-linux-driver-for-6-6-kernel/6461757Tue, 25 Aug 2026 11:21:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:9cc85f6c-bd50-474a-b75e-fd3e2e6a6468De BugAn issue was identified with the platform driver. the platform driver uses some customized code to initialize it&#39;s PLL . The platform driver code link-&gt;codecs-&gt;dai_name picks up the TAC5212 codec as taa5x1x-hifi-04-51. (bus 4, I2C address 0x51) seen the tac5x51 driver code dai-&gt;name = devm_kasprintf(dev, GFP_KERNEL, &quot;taa5x1x-hifi-%02x-%02x&quot;, i2c-&gt;adapter-&gt;nr, i2c-&gt;addr); for many different model the name is set. 1. Perhaps the constant (&quot;taa&quot;) could cause wrong initialization by platform drivers ? 2. Why is this naming format chosen ? 3. aplay -l shows an extra &quot;0&quot;: card 0: titac5212 [ti,tac5212], device 0: tac5212 taa5x1x-hifi-04-51-0 [tac5212 taa5x1x-hifi-04-51-0]https://e2e.ti.com/support/audio-group/audio/f/audio-forum/1676288/purepathstudio-adc5120-evmTue, 25 Aug 2026 09:18:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:2581a763-adea-4f05-99d1-872c5c8f0ffePedro SilvaPart Number: PUREPATHSTUDIO Hi, I have ADC5120 EVM with the ADC-MB kit. How do I install this in the Purepatt? I cannot find any link, or the Purepath to detect the board.PurePathStudiohttps://e2e.ti.com/support/audio-group/audio/f/audio-forum/1675666/tac5212-jack-detect-with-tac5212-with-receptacle-switches/6461627Tue, 25 Aug 2026 08:58:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:3f9ea6c0-1d62-4b7c-9edb-82b006b17381Marcell BalazsThank you for your reply! I removed the analog switch, so my design is simpler, and a slight performance decrease is not a big problem for me. One more question: If the GND pin of the 3.5mm jack is connected to the common mode voltage, and if I plug in headphones that have a microphone, the microphone will see the ≈1.65V as GND. Would it be ok if I used the provided MICBIAS pin (set to AVDD passthrough, so it provides 3.3V) to bias the microphone?https://e2e.ti.com/support/audio-group/audio/f/audio-forum/1675630/tac5212-tac5x1x-linux-driver-device-tree-yml-doesn-t-have-a-config-for-out1x/6461611Tue, 25 Aug 2026 08:48:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:21ce5076-549f-41bb-aedb-d82a9d2fd0d6Marcell Balazs1) Yeshttps://e2e.ti.com/support/audio-group/audio/f/audio-forum/1675630/tac5212-tac5x1x-linux-driver-device-tree-yml-doesn-t-have-a-config-for-out1x/6461600Tue, 25 Aug 2026 08:39:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:3fa15247-7e54-4657-864f-95d2adba872aNiranjan Holalu YogendraHi Marcell Balazs 1] Could you please confirm if you&#39;re talking about the &quot;* -vcom-cfg&quot; ? 2] Thanks for pointing out the bug. I will fix it. Source code here - git.ti.com/.../tac5x1x-i2c.chttps://e2e.ti.com/support/audio-group/audio/f/audio-forum/1675639/tac5112evm-k-tac5112-sample-code/6461585Tue, 25 Aug 2026 08:26:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:383a6167-d159-45a8-b7d7-9e5dd2551c49Roy Chou1Hi Mir, The device tree configuration is implemented according to the YAML file in the lpaa-android-drivers/tac5x1x-linux-driver - Unnamed repository; edit this file &#39;description&#39; to name the repository. Currently, there is no GPIO usage requirement, and the I2C rate is configured to 400kHz. Personally, I believe this is unrelated to the device tree. The device tree configuration is shown in the image below. In the driver program, I adjusted the timing of the power-on and channel-enabling operations for registers 0x02 , 0x76 , and 0x78 by moving them into the resume and suspend functions. The sequence is: probe: 0x02 0x01 suspend: 0x02 0x00 , 0x02 0x01 , 0x78 0x00 , 0x76 0x00 resume: 0x78 0x40 , 0x76 0xc0 , 0x02 0x09 No registers are written in either the dac_event or channel_unlocked functions. Under this condition, the first time aplay is used there is no sound, but it starts to output sound stably and normally from the second time onwards. If it is adjusted back to the unmodified version—where register 0x02 is operated within the suspend / resume functions, while registers 0x78 and 0x76 are operated within dac_event and channel_unlocked —there is no sound at all, regardless of how many times aplay is played. Currently, I am using the TAC5112 EVM-K , with jumpers J72 and J73 removed, and using flying wires for I2C to the SCL and SDA test points. I am wondering if this could be due to hardware-related reasons? Another question is: if I short jumpers J72 and J73 and use external I2C control, but PPC (PurePath Console) only reads the registers during audio playback and after it finishes, will this read register value be accurate? Regards, Royhttps://e2e.ti.com/support/audio-group/audio/f/audio-forum/1674779/tlv320aic3107-dac-noise-floor-increase/6461552Tue, 25 Aug 2026 08:06:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:93beee52-d265-41fb-a3be-8c8d97acf210user1238011Hi, The I2C settings are consistent with the comments you provided. When I turned AGC OFF, the noise level decreased to the same level as Test 1, approximately -70 dBm. The commands used for this test are as follows. Test A w 30 13 04 w 30 08 C0 w 30 07 88 w 30 25 80 w 30 29 40 w 30 2B 00 w 30 56 09 For reference, when AGC was disabled and the PGA gain was manually set to 0 dB, the noise level increased to -40 dBm. The commands used for this test are as follows. Test B w 30 13 04 w 30 08 C0 w 30 07 88 w 30 25 80 w 30 29 40 w 30 2B 00 w 30 56 09 w 30 0F 00 # PGA gain = 0 dB I have the following questions regarding the AGC and noise gate behavior. The AGC has a Noise Gate function, which is enabled in my configuration. My understanding is that when the input level is below the noise gate threshold, the AGC does not increase the PGA gain. If this is correct, even when the AGC is enabled, shouldn&#39;t the noise be detected as being below the noise gate threshold and therefore maintain the approximately -70 dBm noise floor? In other words, does simply passing the signal through the AGC and Noise Gate cause the noise floor to deteriorate from -70 dBm to -40 dBm? Alternatively, is the following interpretation correct? When the Noise Gate becomes active, the AGC stops increasing the gain for the noise, and the PGA gain is effectively fixed at 0 dB. If so, I would expect the result to be the same as Test B, where the PGA gain is manually fixed at 0 dB. Could you clarify which of these behaviors is correct, and explain why the noise level differs between these conditions? Best regards,https://e2e.ti.com/support/audio-group/audio/f/audio-forum/1674795/tas6424e-q1-output-phase/6461528Tue, 25 Aug 2026 07:44:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:79b5dc24-64c1-4d55-a98e-469a83bd9663Toshiro ImiHi Shadow. Thank you for your feedback. Let me recap the differences. I summarized OUTPUT PHASE differences between two devices on attachment. Please check and correct me if my understanding is incorrect. e2e.ti.com/.../TAS6424E_2D00_Q1-OUTPUT-PHASE.pdf