https://e2e.ti.com/support/audio-group/audio/<p style="display:none;">blank</p>en-USTelligent Community 13https://e2e.ti.com/support/audio-group/audio/f/audio-forum/1663039/tpa3118d2-please-review-the-schematic-of-tpa3118d2Fri, 10 Jul 2026 05:06:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:27531673-c277-467a-a76e-788c448619d2Chase JeongPart Number: TPA3118D2 Dear TI experts, My customer made their schematic using TPA3118D2. Could you review this schematic? TPA3118D2_review.pdf Best regards, ChaseTPA3118D2Test &amp; Measurementhttps://e2e.ti.com/support/audio-group/audio/f/audio-forum/1660532/tpa3255-speaker-output-distortion-when-power-more-than100-watts/6411862Fri, 10 Jul 2026 04:00:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:85a1bd65-fc9e-4eaf-bc65-f71a66d7ff6bTaweewong Leelapataafter increas more volume we detect only fault ,no clip_otwhttps://e2e.ti.com/support/audio-group/audio/f/audio-forum/1662996/tsc2013-q1-clear-pen-status-after-touch-and-conversionFri, 10 Jul 2026 02:16:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:9ddc749f-c449-4eca-9645-c48ff8049fb5Allan YatesPart Number: TSC2013-Q1 Running the TS2013 in host initiated conversion mode. PINTDAV configured for PENIRQ or PENIRQ&amp;DAV. I am doing single touch only. I get the touch interrupt and am successfully able to retrieve the touch point. However, the Pen Status flag never clears and I never get an interrupt for a subsequent touch. Is there somthing I need to be doing to set the TSC for the next touch? Thanks, Allan. 3780 2026-07-09 22:40:24 Info Pen Status: 0110001110001100 3789 2026-07-09 22:40:24 Info Pen Status: 0110001110001100 3791 2026-07-09 22:40:24 Info TSC Process triggered 3791 2026-07-09 22:40:24 Info Pen Status: 0110001110001100 3800 2026-07-09 22:40:24 Info Pre-Conversion Status: 0000000000000000 3801 2026-07-09 22:40:24 Info Touch X Status: 0000000010000000 3802 2026-07-09 22:40:24 Info Pen Status: 1110001110001100 3812 2026-07-09 22:40:24 Info Touch X Status: 1000000010000000 3813 2026-07-09 22:40:24 Info Pen Status: 1110001110001100 3823 2026-07-09 22:40:24 Info Touch Y Status:: 1000000010000000 3825 2026-07-09 22:40:24 Info Pen Status: 1110001110001100 3835 2026-07-09 22:40:24 Info Touch Y Status: 1100000010000000 3836 2026-07-09 22:40:24 Info Pen Status: 1110001110001100 3848 2026-07-09 22:40:24 Info Post-Coordinate Fetch: 0000000010000000 3857 2026-07-09 22:40:24 Info Touched; Raw 1489,2294; Scaled 167,137 3857 2026-07-09 22:40:24 Info ...Configuration Register 0: 0010001110001100 3849 2026-07-09 22:40:24 Info Pen Status: 1110001110001100 3870 2026-07-09 22:40:24 Info Pen Status: 1110001110001100 3872 2026-07-09 22:40:24 Info Pen Status: 1110001110001100TSC2013-Q1https://e2e.ti.com/support/audio-group/audio/f/audio-forum/1660620/tlv320aic3100-the-device-is-not-working-when-we-adjust-the-volume-to-maximum/6411793Fri, 10 Jul 2026 02:12:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:f0bc54d4-2f23-4633-ae1a-c04363691b70Justin WuHi Mir, Micbias is connected to the 10K ohm R6 and 47UF C34, and then R6 and C34 are connected to the HPL pin. Unfortunately, we don&#39;t have a script when it works vs does not work. However, we have been using this chip to produce the same product for many years and testing has not changed. Please see if you can help investigate the faulty chip. Thanks, Justinhttps://e2e.ti.com/support/audio-group/audio/f/audio-forum/1661759/tpa6203a1-start-up-time/6411766Fri, 10 Jul 2026 01:30:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:b117db05-3ae8-4f3e-a945-35e157722d85Shuji IshiwataHi Isaac, I would like to clarify some points I do not fully understand. I received an answer suggesting that input-side capacitance and resistance are possible factors; could you please explain why the issue lies on the input side rather than the output side? Additionally, the customer has reported that the rise time of the output signal appears to be slow when the volume is increased. Does this suggest any specific cause? Best Regards, Ishiwatahttps://e2e.ti.com/support/audio-group/audio/f/audio-forum/1662977/tas67524-q1-tas67524-q1-pop-noise-at-acc-off-depending-on-speaker-load-70khz-oscillation-observed-on-speaker-outputFri, 10 Jul 2026 00:38:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:6d24d380-0f78-4114-9497-fc880ac2b73a星野 裕也Part Number: TAS67524-Q1 Hello, We are evaluating an automotive audio product using the TAS67524-Q1. During our investigation of a pop noise that occurs during ACC OFF, we confirmed that the occurrence of the pop noise depends on the connected speaker load. In addition, we have observed LC resonance, which we believe to be the cause of the pop noise, on the TAS67524-Q1 evaluation board as well. Therefore, we believe this issue may not be unique to our PCB design. We would like to understand whether this phenomenon is a known issue of the TAS67524-Q1 and whether there is a fundamental countermeasure or a TI-recommended circuit solution that can be applied in a production design. ■ Symptoms - During the ACC OFF sequence, a pop noise occurs when the TAS67524-Q1 transitions into either STBY mode or PD mode. - The occurrence of the pop noise depends on the connected speaker load. - The same behavior is observed on all amplifier channels. ■ Investigation Results When observing the positive and negative speaker output bias voltages, we identified a sinusoidal waveform of approximately 70 kHz. This sinusoidal waveform remains present under the following conditions: - Audio source OFF - Digital Mute via I2C register control - MUTE pin (GPIO pin) control The sinusoidal waveform disappears during the ACC OFF sequence, and the transient generated when it disappears is causing the audible pop noise. We have also confirmed the following: - The sinusoidal waveform is not present immediately after power-up. - The sinusoidal waveform appears after audio playback has occurred at least once. - The presence of the sinusoidal waveform depends on the load condition. Furthermore, we observed a similar phenomenon on the TAS67524-Q1 EVM: - A sinusoidal waveform of approximately 90 kHz was observed. - The behavior changes depending on the load condition. ■ Our Assumption We suspect that a load-dependent resonance is occurring due to the interaction between the TAS67524-Q1 output LC filter and the speaker impedance characteristics. However, since a similar phenomenon can also be observed on the EVM, we cannot determine whether this is an expected behavior of the TAS67524-Q1 or an abnormal condition that requires corrective action. ■ Questions 1. Is this phenomenon a known issue or known behavior of the TAS67524-Q1? In addition, is it expected that this kind of LC resonance may occur with certain speaker loads when using the TAS67524-Q1? 2. Please advise TI’s recommended countermeasures for this phenomenon. Are there any production-ready recommendations, such as output filter design guidelines, damping methods, Zobel networks, snubber circuits, or other recommended circuit implementations? Also, is it necessary to optimize the output LC filter values and damping parameters for each individual speaker load, or is there a general countermeasure that is effective across multiple speaker load conditions? 3. Is there a recommended shutdown sequence for reducing or eliminating the pop noise? Oscilloscope waveforms can be provided if necessary. Best regards,HybridTAS67524-Q1electric &amp; powertrain systemshttps://e2e.ti.com/support/audio-group/audio/f/audio-forum/1647080/tas2505-low-audio-output-with-tas20505-digital-input-speaker-amplifier/6411700Thu, 09 Jul 2026 23:28:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:4a235ed7-82f0-4175-bbae-6c816d0ec9baShenghao DingLet me transfer your question to other expert.https://e2e.ti.com/support/audio-group/audio/f/audio-forum/1653235/tac5312-q1-how-to-enable-the-loopback-test/6411673Thu, 09 Jul 2026 22:48:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:28ae4db6-409d-4f14-9f28-6af977b1f29bMir JeffresHi, I see in your biasing circuit that C584 is .1uF, we recommend a 1uF capacitor between the micbias and GND, as shown in this example in the datasheet: Also, I see your capacitors C585-587, can you try to depopulate these? This may be causing the input to think that it is shorted since it may be low impedance to GND especially during powering up. Let&#39;s test the simplest input circuitry first to verify that there is not another issue, and it is due to the input circuit components. Also, make sure that C590 is depopulated, I think it is but I just want to make sure. Best, Mirhttps://e2e.ti.com/support/audio-group/audio/f/audio-forum/1654422/tlv320adc3101-q1-initial-register-settings-of-tlv320adc3101-q1/6411670Thu, 09 Jul 2026 22:44:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:19206f1c-524c-477f-b281-572bcf043407Mir JeffresHi, I went through the register dump. I have a few questions for you, or things for you to consider. First, is your input clock still 12MHz? If so, then your sample rate is 46.875kHz, which is not a standard audio rate, which may affect your audio quality later on once it leaves the codec, for example if your MCU or deserializer is not prepared for that rate. If your input clock is 12.288MHz, this will divide easily to 48kHz which is a more standard audio rate. Second, your inputs are set as follows, which I am not sure if you intend, since we do not have a schematic provided by you or customer: on left ADC PGA: 1) IN1L(P) single ended input, 0dB setting (reg 0x34) 2) IN2R(P) and IN3R(M) differential input, -6dB setting (reg 0x36) -&gt; this is half as loud as it could be for this input on right ADC: 1) digital microphone on GPIO1 (DMDIN), and ADC_MOD_CLK out on GPIO2 (DMCLK). This would be 6MHz if 12MHz input clock, an oversampling of 128x. Make sure your microphone can handle that oversampling rate and input clock. If you can send a schematic I could help more specifically here to make sure you have the inputs set to the right place. I would also check that you are biasing the microphone signal correctly and not introducing some resistor divider on the input. Currently, left ADC volume is 0dB, and right ADC volume is +12dB, from registers 0x53 and 0x54. However, you also have the AGC (automatic gain controller) enabled, which is applying maximum gain to the inputs at the PGA. At the time of the register dump, AGC is applied to the maximum gain for both L and R PGA, however only the left PGA is unmuted. This is fine, since your right ADC is set to digital microphone, this bypasses the PGA. In this diagram, the PGA is the first amplifier triangle on the left side before the delta sigma modulator, so the only volume that you are able to apply is the digital volume as shown, registers 83 and 84 (hex 0x53-54). The maximum digital volume is 20dB in register 0x54 for the right ADC. However, also note that currently in register 0x50 (dec 80), you have set that the digital mic left and right channels are both on rising edge. There is a chance that this could be affecting the signal, you should try to adjust this and see what happens to your signal. Another note I have is that since the AGC is on for the right channel, there may be some edge case happening where there is a digital mic signal and AGC both trying to change the digital volume. The AGC on the left channel may also be a reason why you do not see any changes you make in the volume, since the analog gain is always setting to 40dB. You can turn the AGC off for left channel in register 0x56, and right AGC on register 0x5e. Here is a commented version of the registers that are important for the configuration, with my math on the clocking as well: #relevant lines: P0 0x01 = 0x00 #sw reset should be 0x01 P0 0x02 = 0x20 #reserved P0 0x04 = 0x03 #codec_clkin=pll_clk, pll_clkin=mclk P0 0x05 = 0x91 #pll powered up, p=1, r=1 P0 0x06 = 0x07 #j=7 P0 0x07 = 0x00 #d=0 P0 0x08 = 0x00 #d=0 P0 0x12 = 0x87 #nadc powered up, =7 P0 0x13 = 0x82 #madc = 2 P0 0x14 = 0x80 #aosr = default, 128 #12MHz input -&gt; #12MHz * 7.0 / 7 / 2 / 128 = ADC_FS = 46.875kHz (weird rate, maybe the clock is actually 12,288 for 48kHz?) #ndiv = 8, from adc_clk which is 12MHz * 7 / 7 = 12MHz # BCLK = 12MHz / 8 = 1.5MHz # 2 channels of 16 bit, checks out for i2s mode #adc_mod_clk output = 12MHz * 7/7/2 = 6MHz -&gt; 128x osr for dig mic P0 0x15 = 0x80 #iadc default, 256 P0 0x16 = 0x04 #minidsp decimation ratio = default, 4 P0 0x1b = 0x0c #i2s, 16 bit, bclk and wclk OUTPUT (master mode) P0 0x1d = 0x02 #default, bdiv_clkin=adc_clk P0 0x1e = 0x88 #bclk ndiv powered up,=8 P0 0x21 = 0x10 #default, primary wclk output=internally generated adc_fs clock P0 0x24 = 0x66 #adc powered up, agc=max gain for left and right P0 0x26 = 0x02 #default, early_3 state enabled, both channels on P0 0x2a = 0x06 #sticky flags: right adc overflow, adc barrel shifter output overflow flag P0 0x2b = 0x00 #no live flags P0 0x33 = 0x28 #dmclk/gpio2 output = adc_mod_clk output for digital mic P0 0x34 = 0x04 #dmdin/gpio1 is input mode # P0 0x50 = 0x00 #lchannel dig mic on rising edge, right channel dig mic on rising edge (wrong?) P0 0x51 = 0xc4 #l+r adc powered up, dig mic enabled for radc channel P0 0x52 = 0x00 #l+r adc not muted P0 0x53 = 0x00 #ladc volume=0db P0 0x54 = 0x18 #radc volume =+12dB P0 0x56 = 0x80 #lagc enabled P0 0x58 = 0x50 #max gain = 40dB P0 0x5e = 0x80 #ragc enabled P0 0x60 = 0x50 #max gain = 40db P0 0x65 = 0x50 #max gain, 40db applied P1 0x00 = 0x01 #page 1 P1 0x33 = 0x50 #micbias1 powered to 2.5v, micbias2 powered to 2.5v P1 0x34 = 0xa8 #in1L(P) pin is selected for left adc pga input single ended, 0db setting P1 0x36 = 0x37 #ladc unselected inputs not biased weakly to common mode. #differential pair using in2r(P) and in3r(m) selected with -6dB setting chosen to ladc pga P1 0x37 = 0xaa #no inputs to right pga P1 0x39 = 0x3f #no inputs to right pga, not biased weakly to cm P1 0x3b = 0x46 #lpga not muted, gain = 35dB P1 0x3c = 0xc6 #rpga muted, when unmuted gain=35dB P1 0x3e = 0x01 #ladc pga applied gain != programmed. radc does equal, since muted Best, Mirhttps://e2e.ti.com/support/audio-group/audio/f/audio-forum/1661638/pcm6260-q1-input-protection-and-of-power-behaviour-of-pcm-6xx0/6411521Thu, 09 Jul 2026 20:23:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:99ac14ca-8bdf-4306-9682-f3168c58e738Jan Zimmermannhey Daveon, thanks for your answer. i understand the basic concept of high/ low swing settings etc. and the impact for the resulting digital output. [quote userid=&quot;528774&quot; url=&quot;~/support/audio-group/audio/f/audio-forum/1661638/pcm6260-q1-input-protection-and-of-power-behaviour-of-pcm-6xx0/6409394&quot;]2. Under normal operation microphones and line level sources are voltage sources not current sources. They typically source or inject minimal current as the ADC impedance is high. I expect no more than 500uA from an ECM mic and less from a line source. This reason is why our datasheet typically specs voltage ratings here.[/quote] i understand- i especially ask about the injection current because i need to understand what happens when NOT in normal operation. [quote userid=&quot;528774&quot; url=&quot;~/support/audio-group/audio/f/audio-forum/1661638/pcm6260-q1-input-protection-and-of-power-behaviour-of-pcm-6xx0/6409394&quot;]3. As long as the signal present does not exceed the maximum pin ratings while the device is off, it will be fine.[/quote] well- there is my problem- if the chip is not powered , and micbias therefore not present- the same signal that is well in the abs max Ratings in normal operation are suddenly out of that ratings. as an example: in AC coupled, Singe ended configuration the inputs accept 14pp- (biased around 9v it would result about 2v to 16v- well within the absolut ratings) but when device is powered off and NO micbias present anymore- this same 5v rms signal would result in the input pins seeing -7 to +7V. obviously out of abs max ratings.. so my dilemma is, that without an better understanding the power off behavior i dont know if its afe to use it in an application that has external connectors (therefore no control over signals present at the inputs on power off state). When AVDD, DVDD and MICBIAS are all at 0 V, what is the equivalent input path seen from INxP? Is MICBIAS high impedance ? Is back-powering through the input protection network allowed? Is there a recommended maximum injection current? how/if the chip is protected against negativ voltages? best regards Jan .https://e2e.ti.com/support/audio-group/audio/f/audio-forum/1661310/tac5212-tac5212-differential-dac-output-not-working-on-both-channels/6411360Thu, 09 Jul 2026 17:28:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:14c14fc1-3c22-4fe4-94b9-3044496749f7Arash LoloeeHi Monica, Thanks for confirming all DACs work in SE mode, I had TAD521 EVM in my lab ( it has only the DAC device, not the ADC) and I am able to see the differential outputs on both DAC1 and DAC2 as expected I have attached few pictures along with the register dump for it . This script should work for you as I have extracted it myself Somewhere you are doing something that is not expected by the device. Hopefully with the new script you can get it to work. e2e.ti.com/.../TAD5212-Reg-dump-Diff.cfg Regards, Arashhttps://e2e.ti.com/support/audio-group/audio/f/audio-forum/1662564/tlv320aic3107-agc-negative-pga-gain-range/6411280Thu, 09 Jul 2026 16:32:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:faa195e4-521a-4905-b584-79f930ff6892Jeff McPhersonHi, Yes the AGC is able to take the PGA negative but the manual control is only in the positive direction. You can read back Registers 32 and 33 to see how much gain is applied at any moment. The AGC is limited to attenuating the PGA by 12dB Best regards, Jeff McPhersonhttps://e2e.ti.com/support/audio-group/audio/f/audio-forum/1657801/rc4580-the-batch-defect-for-rc4580/6411273Thu, 09 Jul 2026 16:28:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:5b4b4be5-abf6-4ff5-807f-37e5369941b6Chris FeatherstoneHi Zhang, I have very minimal information to use for understanding the problem. We need a detailed description of the problem, ideally with a schematic and measured voltages or currents that are seen as a problem in the application circuit. I am unable to interpret the table of measurements since I don&#39;t know what the circuit is. It would be helpful to see a schematic with the measured voltage points on the schematic with a detailed description of the observed issue. Best Regards, Chris Featherstonehttps://e2e.ti.com/support/audio-group/audio/f/audio-forum/1662798/tpa2012d2-tpa2012d2rtjtg4-no-output-despite-valid-1khz-input-signal-and-sd-pins-correctly-driven/6411275Thu, 09 Jul 2026 16:28:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:32cd3d0d-ae4d-4b4e-9826-8f2356886100Isaac BulivaHi Sajid, I notice that your unused input its not properly terminated, this is typically done with a capacitor rather than a resistor. The typical single ended input configuration is shown below although it is stereo output, I don&#39;t see your current configuration listed in the datasheet. TPA2011D1 would be a better match for single ended input and mono output. Regards, Isaachttps://e2e.ti.com/support/audio-group/audio/f/audio-forum/1660532/tpa3255-speaker-output-distortion-when-power-more-than100-watts/6411207Thu, 09 Jul 2026 15:58:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:afa6eb86-4b56-4ab1-b558-14d4b1e01021Isaac BulivaTaweewog, Sorry I misspoke earlier, TPA3255 actually has a fixed gain of 21.5dB. Do you see anything on your error reporting pins; FAULT and CLIP_OTW? Regards, Isaachttps://e2e.ti.com/support/audio-group/audio/f/audio-forum/1657558/ts12a12511-audible-tick-pop-while-switching-ts12a12511-in-audio-signal-path/6411156Thu, 09 Jul 2026 15:27:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:47a1ec5a-a00e-4d67-aa36-fad189a58411Arya HusseinHi Falguni, A new device that has that wide of a voltage range would be the TMUX4827 or TMUX4821. These device have beyond the supply feature supports signal voltages beyond the supply on the source (Sx) and drain (Dx) pins up to &#177;12V. This feature allows both AC and DC bidirectional signals above Vdd and below ground to pass through the switch without distortion, using a unidirectional supply. If this these device does not fit in your system. I would recommend having a pull down resistor on the line to discharge the pop noise when switching. Also adding a capacitor to ground will help even further. Thank you, Aryahttps://e2e.ti.com/support/audio-group/audio/f/audio-forum/1662798/tpa2012d2-tpa2012d2rtjtg4-no-output-despite-valid-1khz-input-signal-and-sd-pins-correctly-drivenThu, 09 Jul 2026 12:12:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:08186913-e95f-4fd5-8b91-a50471e41cd9sajid ehsanPart Number: TPA2012D2 Other Parts Discussed in Thread: TLV320AIC3106 , TPA2011D1 Hi TI team, I&#39;m working with a TPA2012D2RTJTG4 Class-D speaker amplifier on a custom board, paired with a TLV320AIC3106 audio codec (SoC: AM62A). I&#39;m seeing zero output on the amp despite everything upstream measuring correctly on a scope/multimeter. Details below — hoping for guidance on what else to check before assuming a bad part. What&#39;s confirmed working: Input signal : Scope-verified clean 1kHz sine wave present at the amp&#39;s differential input pins ( INL+ / INL- ), driven from the codec&#39;s MONO_LOP / MONO_LOM output through the AC-coupling network (per our schematic: series resistor + coupling cap into each input pin). Shutdown/enable pins : SDL = high (~3.3V, measured with multimeter), confirming the left channel is enabled per the datasheet&#39;s active-low shutdown definition. SDR is intentionally left low (right channel unused, no load connected to OUTR&#177; ), since only the left channel drives our speaker. Codec side : Confirmed via DAPM/ALSA debug that the codec is correctly configured and actively streaming (digital audio chain fully verified working — capture works, and headphone-jack playback tested clean on TI&#39;s own AM62A-SK EVM reference design using this same TLV320AIC3106 with an identical software/DAI configuration). What&#39;s not working: OUTL+ / OUTL- show zero output — no AC signal, and DC level (idle, no-signal) reads 0V relative to board ground on both output legs, rather than the expected mid-supply bias typical of a BTL Class-D output stage. This is with the part socketed/soldered as originally assembled; we also reflowed/reworked the part once already with no change in behavior.schmatic ss is attachedTPA2011D1TLV320AIC3106TPA2012D2Applianceshttps://e2e.ti.com/support/audio-group/audio/f/audio-forum/1661310/tac5212-tac5212-differential-dac-output-not-working-on-both-channels/6410830Thu, 09 Jul 2026 11:30:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:19ead6bb-05c4-453d-839a-5d5aea1a261bMonica DHi Arash, Thank you for your suggestions. I have completed the requested tests and observed the following: I configured all DAC output channels in single-ended mode , and all channels are working correctly . I swapped the output configurations: DAC1 configured as Single-ended → analog output is present. DAC2 configured as Differential → No analog output is observed. I also configured DAC1 as Differential and DAC2 as Single-ended . DAC1 (Differential) → No analog output. DAC2 (Single-ended) → analog output is present. I restored the following registers to the suggested/default values: PASI_RX_CH2_CFG (0x29) = 0x21 CH_EN (0x76) = 0xCC However, the behavior remains unchanged. I monitored the signals directly at the DAC output pins. From these observations: All DAC channels operate correctly in single-ended mode . Regardless of whether DAC1 or DAC2 is configured for differential output , the corresponding differential output does not produce any analog signal. Could you please advise if there are any additional registers or initialization steps required specifically for enabling the differential DAC output drivers? Thanks and Regards, Monicahttps://e2e.ti.com/support/audio-group/audio/f/audio-forum/1662516/tas6584-q1-emc-reference-design-emc-report-tas6584q1phd_emc_ref_2p0/6410797Thu, 09 Jul 2026 10:46:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:4627feb7-e86f-4774-a42b-736c696cfed8zhaoying wangHi Fernando, I have sent this to you though email, please check. Best Regards, Zoey Wanghttps://e2e.ti.com/support/audio-group/audio/f/audio-forum/1662202/purepathstudio-request-for-purepathconsole/6410770Thu, 09 Jul 2026 10:23:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:e81e1ef3-6cf7-48ef-9064-9e4850a7b8a1Arash LoloeeExellant! Arash