https://e2e.ti.com/support/audio-group/audio/<p style="display:none;">blank</p>en-USTelligent Community 13https://e2e.ti.com/support/audio-group/audio/f/audio-forum/1687219/tas67524-q1-we-have-two-questions-regarding-the-amp_fault-pin-of-tas67524-q1/6503399Wed, 07 Oct 2026 02:32:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:b6626f16-238d-449e-bd7d-dd364aeb53beDylan YaoKaito, Yes, it is already enabled pull up resistor. [quote userid=&quot;715968&quot; url=&quot;~/support/audio-group/audio/f/audio-forum/1687219/tas67524-q1-we-have-two-questions-regarding-the-amp_fault-pin-of-tas67524-q1&quot;]Is the internal pull-up enabled immediately after device power-up or reset?[/quote] usually we use 10mA as maximum capability of the pin, so ~500ohm is maximum pull up resistor able to be used. [quote userid=&quot;715968&quot; url=&quot;~/support/audio-group/audio/f/audio-forum/1687219/tas67524-q1-we-have-two-questions-regarding-the-amp_fault-pin-of-tas67524-q1/6502436&quot;]We measured the AMP_FAULT pin transition from High to Low and observed a falling time of approximately 5 to 6 ms.[/quote] If there is a pull down at Fault pin, it means there is a true fault reported then auto cleared. Read fault registers and figure out which fault flag is hanging there. [quote userid=&quot;715968&quot; url=&quot;~/support/audio-group/audio/f/audio-forum/1687219/tas67524-q1-we-have-two-questions-regarding-the-amp_fault-pin-of-tas67524-q1&quot;]What is the minimum recommended external pull-up resistor value? [/quote] Dylanhttps://e2e.ti.com/support/audio-group/audio/f/audio-forum/1684334/tas2120-request-for-tas2120-initialization-code-and-register-settings-for-esp32/6503384Wed, 07 Oct 2026 02:11:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:36110983-ab1e-4fd2-b967-ec9c49342d59yd juHi, Isaac. Thank you for the header file! I only have my custom board with the ESP32 and TAS2120, but do not have the TAS2120EVM. Is it still possible to generate and export a header file using the PPC3 software? Also, I have just requested access to the PPC3 software. Could you please check and approve my request? Best regards,https://e2e.ti.com/support/audio-group/audio/f/audio-forum/1687248/adcx140evm-sw-unable-to-download-purepath-console-3-ppc3-http-400-bad-request/6503369Wed, 07 Oct 2026 01:24:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:afe0de0a-a05c-4ae8-80f6-c37b6774067cJaemin YunHello Garret, I requested access to the software resources after purchasing the product. I tried downloading PPC3 again this morning, and it downloaded successfully without any errors. I was not aware that my support inquiry would also be publicly visible on the E2E forum. Since the screenshot contained the download URL, I have removed it from the post.https://e2e.ti.com/support/audio-group/audio/f/audio-forum/1687226/tpa3129d2-plimit-voltage-value-required-to-set-plimit-to-3-5w/6503353Wed, 07 Oct 2026 00:50:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:3f9ed8ba-a8e3-4fbb-8e63-062da2241ff9Shinichi InoueHi Isaac, I confirmed table3. again, there are some example that resistor value( R to GND+R to GVDD) is not 100k ohm (variable resistor total value). PLIMIT2.25V(24k ohm + 51k ohm), PLIMIT1.5V(18k ohm +68k ohm) Could you please let me know where the measure point. Best regards, Shinichihttps://e2e.ti.com/support/audio-group/audio/f/audio-forum/1687226/tpa3129d2-plimit-voltage-value-required-to-set-plimit-to-3-5w/6503342Wed, 07 Oct 2026 00:29:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:b43651bf-1d78-4064-91fd-3ffcdf30be09Shinichi InoueHi Isaac, Thank you for your reply. [quote userid=&quot;683556&quot; url=&quot;~/support/audio-group/audio/f/audio-forum/1687226/tpa3129d2-plimit-voltage-value-required-to-set-plimit-to-3-5w/6503161&quot;]1. GVDD can range between 5.1V and 6.3V with 5.6V being the typical, these are not discrete values of GVDD but rather represent the range possible of variation. The resistor values in Table 3 are likely intended as approximate/example values, and the PLIMIT voltages listed are the measured values on the EVM rather than calculated values. The formula can be used with your actual measured GVDD to determine the true PLIMIT pin voltage, and resistor values can be selected accordingly. [/quote] I confirmed the schematic of TPA3129D2EVM. There are two resistors between PLIMIT pin and GND pin, R4(variable 100k ohm) and R6(20k ohm). I think table3 of the datasheet described only R4. And R6 (20 kΩ) should be taken into account when calculating the PLIMIT voltage. For example, when VCC = 24 V and the PLIMIT voltage is 3.3 V, Table 3 specifies: R to GND = 45 k ohm R to GVDD = 51 k ohm R6 ＝ 20k ohm GVDD=5.6V PLIMIT = 5.6x (45k ohm + 20k ohm)/ (51k ohm + 45k ohm + 20k ohm) =3.14V The value obtained is close to the PLIMIT value(3.3V) specified in the datasheet. Could you please let me know whether this understanding correct ? [quote userid=&quot;683556&quot; url=&quot;~/support/audio-group/audio/f/audio-forum/1687226/tpa3129d2-plimit-voltage-value-required-to-set-plimit-to-3-5w/6503161&quot;]2. Yes, that is the correct relationship between Vp and Vrms.[/quote] I understand. [quote userid=&quot;683556&quot; url=&quot;~/support/audio-group/audio/f/audio-forum/1687226/tpa3129d2-plimit-voltage-value-required-to-set-plimit-to-3-5w/6503161&quot;] 3. That calculation looks correct. . Note that these are theoretical unclipped power levels, and the 17.9 Vrms at PVCC=24V with PLIMIT=GVDD represents the maximum possible output swing, not a continuous rated power point. There would be a significant increase in THD looking at the Total Harmonic Distortion + Noise vs Output Power graphs.[/quote] I understand. [quote userid=&quot;683556&quot; url=&quot;~/support/audio-group/audio/f/audio-forum/1687226/tpa3129d2-plimit-voltage-value-required-to-set-plimit-to-3-5w/6503161&quot;]4. Your calculation seems to make sense, you can use whichever resistance values that can achieve the target PLIMIT voltage, keeping in mind that the GVDD current must be less than 200&#181;A.[/quote] I understand. I will also share GVDD current should be less than 200uA with the customer. I appreciate your great help and cooperation. Best regards, Shinichihttps://e2e.ti.com/support/audio-group/audio/f/audio-forum/1687035/tsc2046-request-for-support-on-touch-screen-controller-tsc2046ipwr/6503322Tue, 06 Oct 2026 23:38:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:12c16178-2731-4893-9722-c859969350beMir JeffresHi, so they have 50k nominal Are you saying when the screen is touched on one half, the PENIRQ stays low and does not go high again? During measurement, the internal pull up gets disconnected, so maybe the screen has an issue where its resistance is lower and continues to show that it is touched when it is not? Have you tried on a different screen? Also, can you make sure that the total resistance between the X+ and Y− terminals is less than 21kΩ. Also, I notice in your schematic that there is a 10n capacitor on your PENIRQ line, can you try disconnecting that to see if it helps? Can you connect PENIRQ directly to your MCU without external pull up or down? Best, Mirhttps://e2e.ti.com/support/audio-group/audio/f/audio-forum/1680123/tlv320aic3107-tlv320aic3107irsbt-mic-record-noise/6503288Tue, 06 Oct 2026 23:02:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:e2ee8ce6-ee0a-4ab0-9bb5-2c47ed4c5e71Mir JeffresHi, Sorry about the delay here. I think the best way to reduce noise is putting the microphone closer to the person you are recording, and then the next software adjustments you can make on our part would be relating to the AGC. You can add a noise gate which turns off the AGC when there is no one speaking, reducing the PGA gain to 0, and then when someone does speak it will boost the signal to the specified volume. This is helpful when you want to reduce noise when there is no one being recorded, but you would have the same signal to noise ratio when they are speaking. You can also check the frequency content of the noise and reduce those frequencies with the biquad filters. Our device does not have a built in noise reduction algorithm as this requires a lot of processing power. However if you had your own noise measuring algorithm on an external DSP, the AIC3107 can do real-time EQ adjustments of the biquad filters if that is desired. Best, Mirhttps://e2e.ti.com/support/audio-group/audio/f/audio-forum/1685982/tlv320aic3104evm-k-tlv320aic3104-bclk-edge-time-and-voltage-excursion-guidance/6503283Tue, 06 Oct 2026 22:56:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:9e8a576a-a3c1-44ac-844c-2d347ac48f41Mir JeffresHi, The threshold applies to all digital audio clocks and data, and it follows the 90-10 spec like you said first ( Rise: 0.33 V to 2.97 V, and fall: 2.97 V to 0.33V), sorry I had described it wrong. I would recommend a bigger termination resistor like 50ohm and you can increase from there to reduce your clock overshoot. It seems like these measurements in your most recent post are worse than what you described in the original post, but maybe that was measurement error? Best, Mirhttps://e2e.ti.com/support/audio-group/audio/f/audio-forum/1685482/tlv320aic3104-tlv320adc3104-of-34khz-tone-noise-countermeasure/6503268Tue, 06 Oct 2026 22:32:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:b3656cce-126b-43ca-b24b-3fdcc539f6b9Garret GodfreyHello Ryusuke-san, Here is app note that explains this issue: https://www.ti.com/lit/an/spva062/spva062.pdf Best, Garrethttps://e2e.ti.com/support/audio-group/audio/f/audio-forum/1687226/tpa3129d2-plimit-voltage-value-required-to-set-plimit-to-3-5w/6503161Tue, 06 Oct 2026 20:11:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:7ff77db3-afb8-4e09-8122-4e3078aa6d84Isaac BulivaHi Shinichi, 1. GVDD can range between 5.1V and 6.3V with 5.6V being the typical, these are not discrete values of GVDD but rather represent the range possible of variation. The resistor values in Table 3 are likely intended as approximate/example values, and the PLIMIT voltages listed are the measured values on the EVM rather than calculated values. The formula can be used with your actual measured GVDD to determine the true PLIMIT pin voltage, and resistor values can be selected accordingly. 2. Yes, that is the correct relationship between Vp and Vrms. 3. That calculation looks correct. . Note that these are theoretical unclipped power levels, and the 17.9 Vrms at PVCC=24V with PLIMIT=GVDD represents the maximum possible output swing, not a continuous rated power point. There would be a significant increase in THD looking at the Total Harmonic Distortion + Noise vs Output Power graphs. T he PLIMIT circuit operates independently of the input signal, limiting the peak output voltage regardless of input level or gain setting. The note about &quot;1 Vrms at 26 dB gain&quot; is describing the test condition used for measurement purposes. 4. Your calculation seems to make sense, you can use whichever resistance values that can achieve the target PLIMIT voltage, keeping in mind that the GVDD current must be less than 200&#181;A. Regards, Isaachttps://e2e.ti.com/support/audio-group/audio/f/audio-forum/1681660/tac5212-no-audio-from-right-channel-with-4-ohm-speaker-continued-due-to-ti-system-error/6503144Tue, 06 Oct 2026 19:50:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:06e76e0a-7412-4ba0-a552-8017b7fd1327Garret GodfreyHi De Bug, What is the audio file you are using to test? Can you try writing 0x40 to 0x1A? Best, Garrethttps://e2e.ti.com/support/audio-group/audio/f/audio-forum/1686751/tas5827-inquiry-regarding-the-differences-between-the-tas5827-s-class-h-algorithm-and-the-tas5828m-s-hybrid-pro-algorithm/6502967Tue, 06 Oct 2026 16:05:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:876f43e8-40f0-454c-a256-f16b492742b7Kevin ChenHi JH, A1. The algorithms are the exact same. The TAS5828M datasheet mentions a Hybrid-Pro feedback pin (HPFB) but this pin is configured exactly like how it&#39;s done on TAS5827 where both are done through 1 of 3 GPIO pins. Could you provide exactly where in the datasheet it suggests that there are differences? I see that the TAS5828M datasheet has a section dedicated to Hybrid-Pro while TAS5827 does not have a dedicated section to class-H, but the functionality in both is the same. A2. Deciding between the two depends entirely on the intended application. The two have very similar electrical characteristics, with TAS5828M providing slightly more power with worse noise performance while TAS5827 has slightly better noise performance at the cost of slightly lower power output. More importantly, TAS5827 is in a smaller VQFN package compared to TAS5828M which is in TSSOP. If size is a concern, TAS5827 is a better fit. If you need more help on deciding which to choose, I can make a better judgment if you provide more details about your application. Best, Kevinhttps://e2e.ti.com/support/audio-group/audio/f/audio-forum/1686706/pcm5242-the-delay-does-not-match-the-value-specified-in-the-datasheet/6502942Tue, 06 Oct 2026 15:53:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:43ff1dde-971f-4d83-842b-4961db92e9baArash LoloeeHello, The name &quot;Low Latency&quot; refers to its relative latency compared to the &quot;Normal&quot; filter (20/Fs) and &quot;High-Attenuation&quot; filter (33.7/Fs). In general Asymmetric FIR achieves lower delay compare to other filters. So there is no error in datasheet in its reporting that Asymmetric FIR Interpolation Filter has a lower delay. In fact other DACs such as PCM5122 and PCM5121 have the same delays. You also confirmed that Page 0, Register 43 (0x2B), using the D[4:0] changes the measured delay. So your programing the registers seems to be working too. However, the Low Latency filter is architecturally an IIR filter , while Asymmetric FIR is a FIR filter as the name says. I believe IIR filters have some sort of frequency-dependent group delay, while Asymmetric FIR delay holds uniformly across the signal content in their passband. So my thinking is that the 3.5/Fs is a typical value that can shift with signal content, where as 1.2/Fs is not going to change in the passband but can spikes aggressively in the transition band and stopband. So this is what might be happening in your measurement, Having said that, I still would use Asymmetric filter for the lowest delay regardless of what you are measuring. Kind Regards, Arash .https://e2e.ti.com/support/audio-group/audio/f/audio-forum/1687248/adcx140evm-sw-unable-to-download-purepath-console-3-ppc3-http-400-bad-request/6502927Tue, 06 Oct 2026 15:35:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:ebe79fb7-6354-447d-af18-e53c5d02654cGarret GodfreyHello, Can you please share where you obtained this download link? Best, Garrethttps://e2e.ti.com/support/audio-group/audio/f/audio-forum/1684994/pcm1822-pcm1822-single-ended-dc-line-inputs-specs-how-to/6502918Tue, 06 Oct 2026 15:27:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:1950aa32-4f83-447f-864f-7c5a5fbd49e8Garret GodfreyHi Christian, Detailed information on the biquads can be found here: https://www.ti.com/lit/an/sbaa497b/sbaa497b.pdf However, the built-in HPF offers a programmable option which can be set to 1 Hz without using the biquads: These details are on ppage 35-36 of the datasheet. Best, Garrethttps://e2e.ti.com/support/audio-group/audio/f/audio-forum/1686915/pcm5122-pcm5122-slave-mode-with-12-mhz-sck-from-cp2615-usb-bridge-pll-reference-sck/6502913Tue, 06 Oct 2026 15:19:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:7adee952-c5c5-43af-a820-487fd4814031Christoph GysinNo problem thank you very much for your help.https://e2e.ti.com/support/audio-group/audio/f/audio-forum/1684994/pcm1822-pcm1822-single-ended-dc-line-inputs-specs-how-to/6502836Tue, 06 Oct 2026 14:15:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:c7d2fe81-f498-46ab-8d79-66af21071290Christian ErleSo where&#39;s detailled info about IIR coefficients, their format, etcpp ?https://e2e.ti.com/support/audio-group/audio/f/audio-forum/1684994/pcm1822-pcm1822-single-ended-dc-line-inputs-specs-how-to/6502790Tue, 06 Oct 2026 13:38:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:c3b516f1-17ad-493b-bf98-16ded917ac69Christian Erle... or with the IIR ?https://e2e.ti.com/support/audio-group/audio/f/audio-forum/1686915/pcm5122-pcm5122-slave-mode-with-12-mhz-sck-from-cp2615-usb-bridge-pll-reference-sck/6502756Tue, 06 Oct 2026 12:54:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:19777346-49d3-4528-abf2-cca414b46fc1Arash LoloeeYes, Reg 40 is for data format , Reg37 for IDBK, IDCM and IDCH, sorry for confusion. I don&#39;t believe PCM5102 has a similar option to disable the clk error detection. PCM510x is a hardware control so it has limited options. The 4% tolerance applies to Fs. BCK uses the following equation BCLK= # of Ch. * Ch depth * Fs Master clk follows Table 10. System Master Clock Inputs for Audio Related Clocks- based on the fs Regards, Arashhttps://e2e.ti.com/support/audio-group/audio/f/audio-forum/1684994/pcm1822-pcm1822-single-ended-dc-line-inputs-specs-how-to/6502749Tue, 06 Oct 2026 12:44:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:156aebbf-5710-4c2c-8d3f-cc49208674f9Christian ErlePCM6120 is working, now I only have to get some SW to implement a high pass with a much lower corner frequency than the inbuilt one. Is it possible to get a high pass with fc ~ 1 Hz at a sampling rate of 96 kHz with the biquads ?