https://e2e.ti.com/support/audio-group/audio/<p style="display:none;">blank</p>en-USTelligent Community 13https://e2e.ti.com/support/audio-group/audio/f/audio-forum/1634609/pcmd3180-q1-how-to-configure-the-device-tree-for-pcmd3180-in-thor-linux-6-8/6304154Fri, 10 Apr 2026 16:58:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:0603e0e5-8cfb-400c-97fa-a7d072f417fbGarret GodfreyHi Hangxiang, First you must enable the inputs and output slots: Register 0x73 = 0xff Register 0x74 = 0xff Best, Garrethttps://e2e.ti.com/support/audio-group/audio/f/audio-forum/1634775/pcm6240-q1-schematic-review-and-software-setting/6304125Fri, 10 Apr 2026 16:44:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:ba105273-f266-4c00-8ea3-1bec867752f0Garret GodfreyHi Kenneth, The input signal swing is not defined by MICBIAS - Vcm. MICBIAS and Rext simply set a Vcm that aims to set below MICBIAS and keep the input signal swing within the ratings of the inputs pins. The goal of Vcm is such that the input signal does not clip. Setting a Vcm too low can cause the signal to clip below 0V. I do not think that a 100kOhm MICBIAS resistor is a good idea - it is not often this high value for this application and will not tolerate any input greater than 1Vrms (where the single-ended full-scale is 5Vrms). I suppose it is possible but only if the input will never exceed 1Vrms max (-14 dBFS). Best, Garrethttps://e2e.ti.com/support/audio-group/audio/f/audio-forum/1633158/tpa6133a2-question-about-the-tpa6133a2/6304052Fri, 10 Apr 2026 15:48:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:0c426f20-b6c6-4429-acc2-00f580a948fbPeter Wu5Hi Ryu, Sorry for waiting, I will reply by next working day. Thanks.https://e2e.ti.com/support/audio-group/audio/f/audio-forum/1635033/tas2563-tas2568ycgr-schmatic-review/6304047Fri, 10 Apr 2026 15:47:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:613f8c5e-74a1-4210-979b-1126574dabe6Peter Wu5Hi Allen, I will reply by next working day. Thanks.https://e2e.ti.com/support/audio-group/audio/f/audio-forum/1634040/taa3040-changing-hpf-setting/6304043Fri, 10 Apr 2026 15:44:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:c803bde4-d831-4d7b-9a02-e1b1b8dafea4Adam GarstoneJust using a low frequency square wave. With the all pass it&#39;s square (!) but obviously the HPF &#39;droops&#39; the top and bottom of the signal. Similarly, change the DC level of the input signal in all pass and the output DC level changes – change DC level in HPF and the output doesn&#39;t change.https://e2e.ti.com/support/audio-group/audio/f/audio-forum/1635368/purepathstudio-did-not-receive-access/6304018Fri, 10 Apr 2026 15:29:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:1155329b-0702-4dde-ae90-6ef6e25a2f91Nayeem MahmudHi Mykola, We are looking into this internally and will grant you the access shortly.https://e2e.ti.com/support/audio-group/audio/f/audio-forum/1635368/purepathstudio-did-not-receive-accessFri, 10 Apr 2026 14:21:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:943d41cd-f5af-45a1-b28a-24ad0484acb8Mykola TyshchenkoPart Number: PUREPATHSTUDIO Other Parts Discussed in Thread: PUREPATHCONSOLE , TAS5508C I think it&#39;s a mistake not to grant me access, since I have your products (tas5508c) and I need this program(purepathconsole) to calculate biquadsPurePathStudioTAS5508CPUREPATHCONSOLEhttps://e2e.ti.com/support/audio-group/audio/f/audio-forum/1634040/taa3040-changing-hpf-setting/6303881Fri, 10 Apr 2026 14:10:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:7bade42b-ea31-48ec-9479-2a553a2e15f8Garret GodfreyHi Adam, How are you measuring the effect of the HPF? Can you send any filter response plots you may have taken that show this issue? Best, Garrethttps://e2e.ti.com/support/audio-group/audio/f/audio-forum/1631511/pcm6260q1evm-pdk-channels-1-and-2-don-t-show-up-on-esp32-s3-via-external-asi/6303867Fri, 10 Apr 2026 14:01:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:6a3ad9be-6df3-428f-8b7d-5d709b477fa1Garret GodfreyYou&#39;re welcome, Cesar.https://e2e.ti.com/support/audio-group/audio/f/audio-forum/1635316/tad5212-schematic-review/6303863Fri, 10 Apr 2026 13:58:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:fedcc976-acfc-48bb-a93b-1dd25da1f411Garret GodfreyHi Stone, VREF should have a 1uF capacitor to GND, and should not be connected elsewhere in the design as a voltage source. I would also add pull-ups on SCL and SDA. Best, Garrethttps://e2e.ti.com/support/audio-group/audio/f/audio-forum/1635050/tpa3255-the-capacitor-at-the-pvdd-terminal-is-burned-out/6303823Fri, 10 Apr 2026 13:20:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:f969ad34-3016-4004-9c78-22f6bfef5fdePham ButHi, This is capacitor MPN CL21B104KCFNNNE I&#39;m not sure if the absence of capacitors C31 and C34 is the main cause, but in reality, I occasionally encounter ICs that constantly report errors, possibly due to ESDhttps://e2e.ti.com/support/audio-group/audio/f/audio-forum/1635312/tas2781-r_ds-on/6303775Fri, 10 Apr 2026 12:27:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:40f31c24-be21-4743-be29-4a322ee8c4cbWenbin Li1Hi the R_DS(on) of low power AMP will not show in the datasheet. and usually, it is not so important for the lower output. do you have any issue or concern which related to R_dson?https://e2e.ti.com/support/audio-group/audio/f/audio-forum/1633175/lm49450-current-consumption-of-lm49450/6303755Fri, 10 Apr 2026 12:09:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:87bd7c14-7f51-4be9-ac64-ff6002bfd028Wenbin Li1Hi Maishalini T, usually, the current on IOVDD is very small, I think it should be less than 1mA. regarding the current on the output, it depends on the output power of speaker. for example, 1W@8ohm speaker, the peak current is sqrt(2*1/8)=0.5A Br, Wenbinhttps://e2e.ti.com/support/audio-group/audio/f/audio-forum/1635316/tad5212-schematic-reviewFri, 10 Apr 2026 12:02:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:486f1328-2f86-44d0-bf1c-c9a5fce598c1Stone ZengPart Number: TAD5212 Hi Team, my customer is using TAD5212 on PDA, could you help review the schematic as below Regards, StoneAppliancesTAD5212https://e2e.ti.com/support/audio-group/audio/f/audio-forum/1635312/tas2781-r_ds-onFri, 10 Apr 2026 11:44:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:5cad0b88-a48b-41b5-88f6-245cb5c5d013switchPart Number: TAS2781 Hi ti team, What is the R_DS(on) of the high/ low side MOSFETs of the TAS2781?TAS2781Home theater &amp; entertainmenthttps://e2e.ti.com/support/audio-group/audio/f/audio-forum/1635050/tpa3255-the-capacitor-at-the-pvdd-terminal-is-burned-out/6303700Fri, 10 Apr 2026 11:24:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:0ff90888-8e41-46b5-b42d-01effbb6458fWenbin Li1Hi Pham, Let&#39;s discuss the cap issue first. I never see such issue before. if you just remove the cap C31/C34 is there any function error happens? if not, can you test the signals on the PVDD in this case? I guess there is high frequency noise which is higher than the Self-Resonant Frequency of the CAP. in this case, can you change to a lower value CAP for test? such as 10nF? and please consult with capacitor vendor for more details. regarding the snubber design. I will check it and feedback to you later. Br, Wenbinhttps://e2e.ti.com/support/audio-group/audio/f/audio-forum/1634604/tas5558-no-sound-comes-out-in-case-of-input-fs-32khz-with-mclk-4-096mhz/6303691Fri, 10 Apr 2026 11:09:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:aaa78e4c-cf66-43ee-a472-c88ba3d1e872Wenbin Li1Hi Takahashi, it seems you are using ASRC bypass. in this case, please pay attention to the below section: &quot;The default selection for bank control is manual bank with bank 1 selected. Note that if bank switching is used, bank 2 and bank 3 must be programmed on power up, because the default values are all zeroes. If bank switching is used and bank 2 and bank 3 are not programmed correctly, then the output of the TAS5558 could be muted when switching to those banks &quot; Br, Wenbinhttps://e2e.ti.com/support/audio-group/audio/f/audio-forum/1633175/lm49450-current-consumption-of-lm49450/6303642Fri, 10 Apr 2026 10:29:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:021db2ac-2bc1-4c11-b480-009f267c4611Maishalini THi Wenbin, From the datasheet, we were unable to interpret the current consumption values for IOVDD and VDD . In our design, LSVDD is supplied with 3.3 V. Could you clarify the maximum power that can be delivered to LLS+, LLS−, RLS+, and RLS−? Regards, Maishalini Thttps://e2e.ti.com/support/audio-group/audio/f/audio-forum/1635275/tlv320aic3120-switching-between-i2s-playback-and-digital-microphone-recording-on-the-same-din-pinFri, 10 Apr 2026 10:17:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:1f63d632-2342-4785-b844-07cb20fa0bd8Selamu MekonnenPart Number: TLV320AIC3120 Hello, I am using the TLV320AIC3120 in a battery‑powered application where I need non‑simultaneous operation: &#183; Playback mode: DAC active, receiving I&#178;S audio data on the DIN pin. &#183; Record mode: ADC active, reading a digital microphone (PDM output) connected to the same DIN pin. GPIO1 provides ADC_MOD_CLK to the microphone. I understand that simultaneous playback + digital microphone is impossible because DIN is shared. However, I plan to switch modes by reconfiguring registers and tri‑stating the host’s I&#178;S output when switching to record. My questions: 1. Is this switching approach fully supported by the hardware? Are there any internal latches or timing constraints that could cause glitches or require a full reset when changing the function of DIN? 2. What is the correct register sequence to change DIN from I&#178;S input (for DAC) to digital microphone data input (for ADC) without corrupting the device state? &#183; Do I need to power down the DAC completely before reconfiguring? &#183; Do I need to disable the PLL or clock dividers? 3. When switching back to playback, what is the proper order to restore DIN as I&#178;S input and re‑enable the DAC? 4. Are there any hidden restrictions (e.g., the digital microphone mode requires a specific ADC processing block or AOSR that might conflict with later playback sample rates)? 5. Do I need an external analog switch to physically isolate the host’s I&#178;S DOUT from DIN during record mode, or can I simply tri‑state the host’s DOUT pin and rely on the codec’s input buffer? Any guidance, example register sequences, or warnings about potential issues (clicks, pops, latch‑up) would be greatly appreciated. System details: &#183; MCLK = 12.288 MHz &#183; Desired sample rate = 48 kHz (both playback and record) &#183; Host microcontroller: STM32H757 (I&#178;S slave mode during playback, DOUT tri‑stated for record) &#183; Digital microphone: standard PDM with clock on GPIO1, data on DIN Thank you.TLV320AIC3120Portable Electronicshttps://e2e.ti.com/support/audio-group/audio/f/audio-forum/1634609/pcmd3180-q1-how-to-configure-the-device-tree-for-pcmd3180-in-thor-linux-6-8/6303617Fri, 10 Apr 2026 10:12:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:6aa11702-d5db-4611-bcf9-ac7986e603f5hangxiang guoThis is a dump of all register values ​​during recording.