<?xml version="1.0" encoding="UTF-8" ?>
<?xml-stylesheet type="text/xsl" href="https://e2e.ti.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/"><channel><title>Audio</title><link>https://e2e.ti.com/support/audio-group/audio/</link><description>&lt;p style="display:none;"&gt;blank&lt;/p&gt;</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><item><title>Forum Post: RE: TAC5112: Help configuring outputs of codec</title><link>https://e2e.ti.com/support/audio-group/audio/f/audio-forum/1655908/tac5112-help-configuring-outputs-of-codec/6387979</link><pubDate>Thu, 18 Jun 2026 16:14:00 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:a9a47747-c389-4386-bce4-251a08151d67</guid><dc:creator>Scott Monk</dc:creator><description>Hi Garret, Ok thank you for showing me that. I had tried clicking on &amp;quot;Advanced&amp;quot; but not the right side with the check mark, which does bring up the menu you showed. Thank you very much. I will try this out shortly. S</description></item><item><title>Forum Post: RE: LM3481: Current Sense Threshold Voltage for LM3481</title><link>https://e2e.ti.com/support/audio-group/audio/f/audio-forum/1656419/lm3481-current-sense-threshold-voltage-for-lm3481/6387927</link><pubDate>Thu, 18 Jun 2026 15:50:00 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:6f5f24c8-b09b-4119-ba0e-8ba3a68360ed</guid><dc:creator>Hassan Jamal</dc:creator><description>Hi HQ, Thanks for using the E2E forum. Yes, the device this device has larger current sense voltage range. If these limits are too large, you need to change the controller to LM5155, which has tighter limits. Best Regards, Hassan</description></item><item><title>Forum Post: RE: TAC5112: Help configuring outputs of codec</title><link>https://e2e.ti.com/support/audio-group/audio/f/audio-forum/1655908/tac5112-help-configuring-outputs-of-codec/6387826</link><pubDate>Thu, 18 Jun 2026 14:58:00 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:2538e24e-6ead-4a33-81b7-9f6038c767f1</guid><dc:creator>Garret Godfrey</dc:creator><description>Hi Scott, You can enable these in the &amp;quot;Advanced&amp;quot; settings section: Click the Advanced tab, check whichever settings you want to configure, and click Apply. They will appear next to GPIO/Interrupts. Best, Garret</description></item><item><title>Forum Post: RE: TAC5112: to match the full scale</title><link>https://e2e.ti.com/support/audio-group/audio/f/audio-forum/1656582/tac5112-to-match-the-full-scale/6387813</link><pubDate>Thu, 18 Jun 2026 14:53:00 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:18613689-17cc-4415-a7d8-1a3bdde94269</guid><dc:creator>Garret Godfrey</dc:creator><description>Hi Ryusuke-san, If the input exceeds the full-scale (of the amp or codec), it will cause clipping, in which distortion is unavoidable. Each input has its own gain control register, so high/low gain can be processed on the chip without any pre-amp circuit. However, excessive input will still cause clipping and distortion. You would need some attenuator on the front-end, but this could add distortion itself and seems to negate the effect of the pre-amp. My suggestion would be to handle the gain internally, although inputs that exceed the full-scale will still distort. Best, Garret</description></item><item><title>Forum Post: RE: TAA5412-Q1: TAA5412-Q1: Concern about minimum delay between I2C transaction and power-off</title><link>https://e2e.ti.com/support/audio-group/audio/f/audio-forum/1656625/taa5412-q1-taa5412-q1-concern-about-minimum-delay-between-i2c-transaction-and-power-off/6387789</link><pubDate>Thu, 18 Jun 2026 14:41:00 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:391985f9-d58c-4521-9fdb-b2df38bd3235</guid><dc:creator>Garret Godfrey</dc:creator><description>Hello, Yes in this case the main risk is the device not issuing a STOP condition, and thus the shared I2C bus will enter a stuck state. [quote userid=&amp;quot;669352&amp;quot; url=&amp;quot;~/support/audio-group/audio/f/audio-forum/1656625/taa5412-q1-taa5412-q1-concern-about-minimum-delay-between-i2c-transaction-and-power-off&amp;quot;]2. As a mitigation, we currently perform a full register initialization sequence every time the ADC is powered on.[/quote] This is not a sufficient mitigation, as the ADC must be initialized on power-up every time anyway. When AVDD is powered off, the ADC will lose its register configuration. This 10ms must be met to ensure reliable operation. Best, Garret</description></item><item><title>Forum Post: RE: TAS6684-Q1: TAS6684 output sporadically does not come back after STBY is released</title><link>https://e2e.ti.com/support/audio-group/audio/f/audio-forum/1643897/tas6684-q1-tas6684-output-sporadically-does-not-come-back-after-stby-is-released/6387736</link><pubDate>Thu, 18 Jun 2026 14:04:00 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:063b8969-00c8-4830-ae08-0d3c0f59eb10</guid><dc:creator>Stefan Strobel</dc:creator><description>Hi Shadow He, thanks for the suggestion. I tried it and it turned out the issue becomes much rarer, but I am still able to trigger the issue by switching the mute pin under high load. Can you explain how the volume ramp can cause such an Issue and how to avoid it completely? ...at least the volume ramp seems to be part of the problem as it makes the issue much rarer. Thanks a lot Stefan</description></item><item><title>Forum Post: RE: TAC5112: Help configuring outputs of codec</title><link>https://e2e.ti.com/support/audio-group/audio/f/audio-forum/1655908/tac5112-help-configuring-outputs-of-codec/6387704</link><pubDate>Thu, 18 Jun 2026 13:37:00 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:ca5771a1-a18a-47df-8051-c3fb08ce06c5</guid><dc:creator>Scott Monk</dc:creator><description>Hi Jeff, Yes no problem. Thanks for following up. I got the software installed. In the end maybe it seems PPC does not have any configuration settings for the DAC mixer or the BiQuads etc? Even the &amp;quot;register map&amp;quot; tab only shows register pages 0,1 and 3, but the device has several more. But thank you for approving the software download, it is still helpful verifying the other settings. I haven&amp;#39;t had time to go over the other document Garret linked but i will update if i can&amp;#39;t sort it out with that. S</description></item><item><title>Forum Post: TAA5412-Q1: TAA5412-Q1: Concern about minimum delay between I2C transaction and power-off</title><link>https://e2e.ti.com/support/audio-group/audio/f/audio-forum/1656625/taa5412-q1-taa5412-q1-concern-about-minimum-delay-between-i2c-transaction-and-power-off</link><pubDate>Thu, 18 Jun 2026 12:04:00 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:4ea87dcd-3b9b-4b76-b8ab-804a86f47f2a</guid><dc:creator>星野 裕也</dc:creator><description>Part Number: TAA5412-Q1 Hello, I have a question regarding the power-down sequence of the TAA5412-Q1 device. In the documentation / design guidelines, there is a recommendation to maintain a certain delay (e.g. around 10 ms) between the last I2C transaction and power-off. However, in our system, due to system constraints, it is difficult to always guarantee this timing margin. In the worst case, the delay between the last I2C transaction and power-off may be approximately 8.5 ms, which is about 1.5 ms shorter than the recommended 10 ms. I would like to ask the following: 1. What are the potential risks if this delay between the last I2C/SPI transaction and power-off is shorter than recommended? - For example, are there concerns such as incomplete register writes, internal state corruption, or I2C interface lock-up? 2. As a mitigation, we currently perform a full register initialization sequence every time the ADC is powered on. - Does this approach sufficiently mitigate the risks of an early power-off after I2C access? - Or are there additional recommended measures (e.g. specific shutdown sequence, reset control, delay requirements)? 3. Is the I2C bus state (e.g. STOP condition not fully completed, or power-off occurring during an ongoing transaction) a concern for this device? Our system uses a shared I2C bus with multiple devices. Any clarification on recommended best practices for handling this condition would be greatly appreciated. Thank you.</description><category domain="https://e2e.ti.com/support/audio-group/audio/tags/Hybrid">Hybrid</category><category domain="https://e2e.ti.com/support/audio-group/audio/tags/TAA5412_2D00_Q1">TAA5412-Q1</category><category domain="https://e2e.ti.com/support/audio-group/audio/tags/electric%2b_2600_amp_3B00_%2bpowertrain%2bsystems">electric &amp;amp; powertrain systems</category></item><item><title>Forum Post: TS3A227E: Detect headset removal through a permanently-connected TRRS extension without glitching audio</title><link>https://e2e.ti.com/support/audio-group/audio/f/audio-forum/1656620/ts3a227e-detect-headset-removal-through-a-permanently-connected-trrs-extension-without-glitching-audio</link><pubDate>Thu, 18 Jun 2026 11:38:00 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:b4bdbd55-9c93-4f8b-88b3-8e20b229b195</guid><dc:creator>Batuhan Kaya</dc:creator><description>Part Number: TS3A227E Hi all, We have designed audio board using TS3A227E and we have a problem about the headset detection. In our system a passive TRRS extension cable is permanently plugged into our jack, users plug/unplug the headset at the extension&amp;#39;s far end . So a plug is always mechanically inserted — only the load at the far end changes. When the headset is removed from the far end, the mechanical insertion doesn&amp;#39;t change, so AUTO_DET never re-runs and we cant detect the remove action, we have to unplug the extension cable. So can anyone give information about it or help? Thanks and regards, Batuhan</description><category domain="https://e2e.ti.com/support/audio-group/audio/tags/gaming">gaming</category><category domain="https://e2e.ti.com/support/audio-group/audio/tags/TS3A227E">TS3A227E</category></item><item><title>Forum Post: TAC5112: to match the full scale</title><link>https://e2e.ti.com/support/audio-group/audio/f/audio-forum/1656582/tac5112-to-match-the-full-scale</link><pubDate>Thu, 18 Jun 2026 09:37:00 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:a56d3d2f-d568-4ca9-bfe8-3f98d1de106f</guid><dc:creator>R.Fukunaga</dc:creator><description>Part Number: TAC5112 Hi all, It is under development using the TAC5112. We have adopted a &amp;quot;Dual AD configuration&amp;quot; in which the same analog input signal is split into 2 channels (&amp;quot;High Gain&amp;quot; and &amp;quot;Low Gain&amp;quot;) by the op-amp in the first stage, and input to separate ADC input pins of the TAC5112. In this configuration, signals input through the ADC (Dual AD) → processed by the CPU → output from the DAC We measured the through-characteristics (THD+N) of the above system path using Audio Precision. In doing so, we confirmed a mysterious distortion characteristic that seems to be caused by the full swing of the op-amp (NJM2100) driven by the 3.3VD power supply. We believe that if there is an input that exceeds the full scale, distortion will appear in the output channel. 1) In a system where excessive input can occur, are there any recommended measures, such as hardware measures or software measures (register settings, etc.), to minimize the effect (propagation of distortion) on other channels? 2) If there is a specific circuit (to match the full scale) that you recommend, please let us know. Best Regards, Ryusuke</description><category domain="https://e2e.ti.com/support/audio-group/audio/tags/Industrial%2bAutomation">Industrial Automation</category><category domain="https://e2e.ti.com/support/audio-group/audio/tags/TAC5112">TAC5112</category></item><item><title>Forum Post: TLV320AIC3109EVM-K: TLV320AIC3109-Q1 : SINAD Loopback Test</title><link>https://e2e.ti.com/support/audio-group/audio/f/audio-forum/1656502/tlv320aic3109evm-k-tlv320aic3109-q1-sinad-loopback-test</link><pubDate>Thu, 18 Jun 2026 07:00:00 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:ddee9b5d-fef1-4746-89d2-b1c9053c002c</guid><dc:creator>yukeun Han</dc:creator><description>Part Number: TLV320AIC3109EVM-K Other Parts Discussed in Thread: TLV320AIC3109-Q1 e2e.ti.com/.../5557.attachment.zip Hi TI team, We are using the TLV320AIC3109-Q1 codec in our system(Qualcomm SA525M) and are currently debugging a SINAD measurement issue. Our test purpose is to pass the input signal through the audio path and measure the output signal without any sound enhancement, compensation, or filtering. Therefore, we would like to make sure that all internal audio processing blocks are disabled, including HPF, AGC, EQ, de-emphasis, 3D/bass/treble, noise filtering, or any other programmable filter/processing that could affect the signal. Issue: - During SINAD measurement, changing the MIC/SPK gain on the codec side improves SINAD only up to around 30 dB. - When we adjust the gain on the modem side, SINAD improves up to around 37 dB. - However, this is still about 10 dB lower than another reference codec/module(other codec vendor&amp;#39;s codec), under a similar test condition. - We suspect there may be some internal filter, audio processing, or non-flat signal path enabled in the TLV320AIC3109-Q1. One thing we checked: - We read register 0x0C using the following command: i2cget -y 0 0x18 0x0C - The value was 0x40. - We changed it to 0x00 to disable HPF-related setting, but we did not observe any meaningful improvement in SINAD. Could you please help us review this situation? Are there any other parts that need to be set up? I attached full commands that we use to initialize codec and SINAD results. (TI vs other reference codec) Thanks, YK Han</description><category domain="https://e2e.ti.com/support/audio-group/audio/tags/TLV320AIC3109EVM_2D00_K">TLV320AIC3109EVM-K</category><category domain="https://e2e.ti.com/support/audio-group/audio/tags/TLV320AIC3109_2D00_Q1">TLV320AIC3109-Q1</category></item><item><title>Forum Post: RE: AM2754-Q1: How to Understand AWE CPU Overflow Information</title><link>https://e2e.ti.com/support/audio-group/audio/f/audio-forum/1655696/am2754-q1-how-to-understand-awe-cpu-overflow-information/6387078</link><pubDate>Thu, 18 Jun 2026 04:40:00 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:608f6730-3a33-49c6-aac0-f9e6cdde5d78</guid><dc:creator>Shreyansh Anand</dc:creator><description>Hi Tingting, Would it be possible for you try your layout with the latest SDK(12.0)? I remember there was an issue in 11.0 SDK with respect to the way mcasp processing was done in the audio app,resulting in constant cpu overflows. This was rectified in 11.2 SDK release. Thanks, Shreyansh</description></item><item><title>Forum Post: LM3481: Current Sense Threshold Voltage for LM3481</title><link>https://e2e.ti.com/support/audio-group/audio/f/audio-forum/1656419/lm3481-current-sense-threshold-voltage-for-lm3481</link><pubDate>Thu, 18 Jun 2026 01:59:00 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:d400c01d-d924-4e37-a490-65ed96d3130a</guid><dc:creator>HQ zheng</dc:creator><description>Part Number: LM3481 Other Parts Discussed in Thread: LM5155 Hello everyone, I have a question that I would like to ask for your assistance. The question is as follows... In the flyback switching power supply that inputs 20V - 30V and outputs 48V/1A, we used the LM3481. According to the official website of LM3481, the Current Sense Threshold Voltage range of this chip is too wide, ranging from 100mV to 190mV. This has caused confusion in our selection of sampling resistors and the definition of the transformer saturation current. During our actual tests, we found that it was defined at 190mV. I hope to have a more precise definition for this parameter, or to explain under what circumstances it corresponds to 100mV and under what circumstances it corresponds to 190mV.. we look forward to your reply. Thank you.</description><category domain="https://e2e.ti.com/support/audio-group/audio/tags/LM5155">LM5155</category><category domain="https://e2e.ti.com/support/audio-group/audio/tags/LM3481">LM3481</category><category domain="https://e2e.ti.com/support/audio-group/audio/tags/Home%2btheater%2b_2600_amp_3B00_%2bentertainment">Home theater &amp;amp; entertainment</category></item><item><title>Forum Post: RE: AM2754-Q1: How to Understand AWE CPU Overflow Information</title><link>https://e2e.ti.com/support/audio-group/audio/f/audio-forum/1655696/am2754-q1-how-to-understand-awe-cpu-overflow-information/6386965</link><pubDate>Thu, 18 Jun 2026 01:54:00 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:21c25e8a-7c39-4f50-a3b5-e7381fd74895</guid><dc:creator>Tingting Zhou</dc:creator><description>Hi Shreyansh， Thanks for your reply. The SDK version is AM275-AWE-SDK_11.00.00.17. Yes, we did not see CPU is more than 100% and just saw the CPU overflow in the upper right corner. However, we have already heard the noise in the output. So we confirmed the CPU load is overflow. By the way, the peak MIPS and average MIPS of our algorithm are big different in my experience. Thanks, Tingting.</description></item><item><title>Forum Post: RE: TAS6684-Q1: Verification of Class D Output Impedance</title><link>https://e2e.ti.com/support/audio-group/audio/f/audio-forum/1656008/tas6684-q1-verification-of-class-d-output-impedance/6386892</link><pubDate>Thu, 18 Jun 2026 00:33:00 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:a230edfa-f087-4565-8282-941940796bde</guid><dc:creator>Wei Qiu</dc:creator><description>Hi Alan. We now don&amp;#39;t have this data. BR. Wei Qiu.</description></item><item><title>Forum Post: RE: TLV320AIC3104: Auido leakage issue</title><link>https://e2e.ti.com/support/audio-group/audio/f/audio-forum/1653204/tlv320aic3104-auido-leakage-issue/6386769</link><pubDate>Wed, 17 Jun 2026 21:57:00 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:b1c39cf3-5ea5-404e-8e4e-91ea850404d2</guid><dc:creator>Jeff McPherson</dc:creator><description>Hi Falguni, The datasheet has a layout guide but it&amp;#39;s hard to see the ground split. I have made a drawing of it below. You should do something like the following Top Layer - Signal layer with split ground Middle Layer 1 - Ground Plane with split ground Middle Layer 2 - Power Plane Bottom Layer - Signal Layer with split ground I think keeping the grounds separate on each layer will prevent any accidental signal crossing. You should minimize any signals crossing the boundary and if they do, you should take care that their return path doesn&amp;#39;t intersect another path from the other plane (digital to analog or vice versa). A small amount of net ties (2-3) should be enough to join them together. Try to do this away from the device. Best regards, Jeff McPherson</description></item><item><title>Forum Post: RE: TLV320AIC3100: Is page0/register44 bit7 a sticky bit?</title><link>https://e2e.ti.com/support/audio-group/audio/f/audio-forum/1656110/tlv320aic3100-is-page0-register44-bit7-a-sticky-bit/6386700</link><pubDate>Wed, 17 Jun 2026 20:57:00 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:7f8b0480-f428-418f-94d0-ff5df153616e</guid><dc:creator>Mir Jeffres</dc:creator><description>Hi, Yes, it is a sticky flag. The real-time flag is here in page 1 register 32: Best, Mir</description></item><item><title>Forum Post: RE: PCM1822: Loud noise/tone from ADC with no input signal applied</title><link>https://e2e.ti.com/support/audio-group/audio/f/audio-forum/1652421/pcm1822-loud-noise-tone-from-adc-with-no-input-signal-applied/6386610</link><pubDate>Wed, 17 Jun 2026 19:46:00 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:88139dd1-9a43-47d6-8bd6-0b25285a2573</guid><dc:creator>Jeff McPherson</dc:creator><description>Hi Markus, Thanks for the update. Garret is out of office and will follow up with you tomorrow U.S. time. Best regards, Jeff McPherson</description></item><item><title>Forum Post: RE: TAC5312-Q1: How to enable the loopback test</title><link>https://e2e.ti.com/support/audio-group/audio/f/audio-forum/1653235/tac5312-q1-how-to-enable-the-loopback-test/6386608</link><pubDate>Wed, 17 Jun 2026 19:45:00 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:a61334f7-7a8a-4824-889c-f94eec964af4</guid><dc:creator>Jeff McPherson</dc:creator><description>Hi Hanbing, Garret is out of office and can follow up with you tomorrow U.S. time. If you would like an EVM you can provide the customer with the TAC5412Q15B5EVM-K . This device is software compatible with TAC5312-Q1 so software development is the same. The customer can also replace the DUT with the TAC5312 as well to evaluate the performance once the software is confirmed. Best regards, Jeff McPherson</description></item><item><title>Forum Post: RE: PCM1863: Request for Support – PCM1863 Microphone Capture No Audio Output</title><link>https://e2e.ti.com/support/audio-group/audio/f/audio-forum/1648428/pcm1863-request-for-support-pcm1863-microphone-capture-no-audio-output/6386602</link><pubDate>Wed, 17 Jun 2026 19:41:00 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:6bfb72bb-f645-4cd7-99bc-bba205ef88ec</guid><dc:creator>Jeff McPherson</dc:creator><description>Hi Luke, Garret is out of office today and will follow up with you tomorrow U.S. time. Thanks for your patience, Jeff McPherson</description></item></channel></rss>