Cannot generate beep from the codec 3254 from audio boostpack

Grace Huang

Other Parts Discussed in Thread: CC3200

I tried to test the codec on the cc3200 audio boosterpack by generating the beep sound.

Here is my code:

#ifndef __TI3254_H__
#define __TI3254_H__

//*****************************************************************************
//
// If building with a C++ compiler, make all of the definitions in this header
// have a C binding.
//
//*****************************************************************************
#ifdef __cplusplus
extern "C"
{
#endif

#define CODEC_I2C_SLAVE_ADDR      ((0x30 >> 1))
#define CRYSTAL_FREQ               40000000
#define SYS_CLK                    CRYSTAL_FREQ

#define TI3254_PAGE_0					0x00
#define TI3254_PAGE_1					0x01
#define TI3254_PAGE_8					0x08
#define TI3254_PAGE_44					0x2C

#define PAGE_CTRL_REG					0x00

// Page 0
#define TI3254_PAGE_SEL_REG				0x00
#define TI3254_SW_RESET_REG				0x01
#define TI3254_CLK_MUX_REG				0x04
#define TI3254_CLK_PLL_P_R_REG			0x05
#define TI3254_CLK_PLL_J_REG			0x06
#define TI3254_CLK_PLL_D_MSB_REG		0x07
#define TI3254_CLK_PLL_D_LSB_REG		0x08
#define TI3254_CLK_NDAC_REG				0x0B
#define TI3254_CLK_MDAC_REG				0x0C
#define TI3254_DAC_OSR_MSB_REG			0x0D
#define TI3254_DAC_OSR_LSB_REG			0x0E
#define TI3254_DSP_D_CTRL_1_REG			0x0F
#define TI3254_DSP_D_CTRL_2_REG			0x10
#define TI3254_DSP_D_INTERPOL_REG		0x11
#define TI3254_CLK_NADC_REG				0x12
#define TI3254_CLK_MADC_REG				0x13
#define TI3254_ADC_OSR_REG				0x14
#define TI3254_DSP_A_CTRL_1_REG			0x15
#define TI3254_DSP_A_CTRL_2_REG			0x16
#define TI3254_DSP_A_DEC_FACT_REG		0x17
#define TI3254_AUDIO_IF_1_REG			0x1B

#define TI3254_DAC_SIG_P_BLK_CTRL_REG	0x3C
#define TI3254_ADC_SIG_P_BLK_CTRL_REG	0x3D

#define TI3254_DAC_CHANNEL_SETUP_1_REG	0x3F
#define TI3254_DAC_CHANNEL_SETUP_2_REG	0x40

#define TI3254_LEFT_DAC_VOL_CTRL_REG	0x41
#define TI3254_RIGHT_DAC_VOL_CTRL_REG	0x42

#define TI3254_LEFT_BEEP_CTRL_REG 		0x47
#define TI3254_RIGHT_BEEP_CTRL_REG		0x48

#define TI3254_BEEP_LEN_MSB				0x49
#define TI3254_BEEP_LEN_MID				0x4A
#define TI3254_BEEP_LEN_LSB 			0x4B

#define TI3254_SINE_MSB					0x4C
#define TI3254_SINE_LSB					0x4D

#define TI3254_COSI_MSB					0x4E
#define TI3254_COSI_LSB					0x4F


#define TI3254_ADC_CHANNEL_SETUP_REG	0x51
#define TI3254_ADC_FINE_GAIN_ADJ_REG	0x52

#define TI3254_LEFT_ADC_VOL_CTRL_REG	0x53
#define TI3254_RIGHT_ADC_VOL_CTRL_REG	0x54



//Page 1

#define TI3254_PWR_CTRL_REG				0x01
#define TI3254_LDO_CTRL_REG				0x02
#define TI3254_OP_DRV_PWR_CTRL_REG		0x09
#define TI3254_HPL_ROUTING_SEL_REG		0x0C
#define TI3254_HPR_ROUTING_SEL_REG		0x0D
#define TI3254_LOL_ROUTING_SEL_REG		0x0E
#define TI3254_LOR_ROUTING_SEL_REG		0x0F
#define TI3254_HPL_DRV_GAIN_CTRL_REG	0x10
#define TI3254_HPR_DRV_GAIN_CTRL_REG	0x11
#define TI3254_LOL_DRV_GAIN_CTRL_REG	0x12
#define TI3254_LOR_DRV_GAIN_CTRL_REG	0x13
#define TI3254_HP_DRV_START_UP_CTRL_REG	0x14

#define TI3254_MICBIAS_CTRL_REG			0x33
#define TI3254_LEFT_MICPGA_P_CTRL_REG	0x34
#define TI3254_LEFT_MICPGA_N_CTRL_REG	0x36
#define TI3254_RIGHT_MICPGA_P_CTRL_REG	0x37
#define TI3254_RIGHT_MICPGA_N_CTRL_REG	0x39
#define TI3254_FLOAT_IP_CTRL_REG		0x3a
#define TI3254_LEFT_MICPGA_VOL_CTRL_REG	0x3B
#define TI3254_RIGHT_MICPGA_VOL_CTRL_REG 0x3C

#define TI3254_ANALOG_IP_QCHRG_CTRL_REG	0x47
#define TI3254_REF_PWR_UP_CTRL_REG		0x7B


// Page 8
#define TI3254_ADC_ADP_FILTER_CTRL_REG	0x01

// Page 44
#define TI3254_DAC_ADP_FILTER_CTRL_REG	0x01


#ifdef __cplusplus
}
#endif


#endif /* __TI3254_H__ */


void AudioCodecBeepConfig() {
    AudioCodecReset(AUDIO_CODEC_TI_3254, NULL);
    Report("Beep config \n\r");

    AudioCodecRegWrite(TI3254_CLK_MUX_REG, 0x07);		// #Set PLL_CLKIN=BLCK and CODEC_CLKIN=PLL_CLK

    AudioCodecRegWrite(TI3254_CLK_PLL_P_R_REG, 0x91);	// #PLL powered up, set PLL variable P=R=1

    AudioCodecRegWrite(TI3254_CLK_PLL_J_REG, 0x20);		// Set PLL variable J=32
    AudioCodecRegWrite(TI3254_CLK_PLL_D_MSB_REG, 0x00);	// # Set PLL variable D(msb)=0
    AudioCodecRegWrite(TI3254_CLK_PLL_D_LSB_REG, 0x00); // D(lsb)=0

    AudioCodecRegWrite(TI3254_AUDIO_IF_1_REG, 0x01); 	// # Mode=I2S, Word length=16, BCLK, WCLK are inputs to codec
    AudioCodecRegWrite(TI3254_CLK_NDAC_REG, 0x84);		// #NDAC powered up and set to 4
    AudioCodecRegWrite(TI3254_CLK_MDAC_REG, 0x84);		// #MDAC powered up and set to 4
    AudioCodecRegWrite(TI3254_DAC_OSR_MSB_REG, 0x00);	// #DOSR=128, DOSR(9:8)=0
    AudioCodecRegWrite(TI3254_DAC_OSR_LSB_REG, 0x80);	// #DOSR(7:0)=128

    AudioCodecRegWrite(TI3254_CLK_NADC_REG, 0x84);    	//#NADC powered up and set to 4
    AudioCodecRegWrite(TI3254_CLK_MADC_REG, 0x84);      //#MADC powered up and set to 4
    AudioCodecRegWrite(TI3254_ADC_OSR_REG, 0x80);    	// AOSR = 128 ((Use with PRB_R1 to PRB_R6, ADC Filter Type A)


    AudioCodecRegWrite(TI3254_DAC_SIG_P_BLK_CTRL_REG, 0x19);  // DAC Signal Processing Block PRB_P19
    AudioCodecRegWrite(TI3254_ADC_SIG_P_BLK_CTRL_REG, 0x4);	// ADC Signal Processing Block PRB_R4
    AudioCodecRegWrite(TI3254_DAC_CHANNEL_SETUP_1_REG, 0xD6);	// Left and Right DAC Channel Powered Up


    AudioCodecPageSelect(TI3254_PAGE_1);		//Select Page 1

    //w 30 21 46 # De-pop, Driver power-on time=600ms, Step time=4ms
    AudioCodecRegWrite(0x21, 0x46);

    //w 30 1F C6 #Power on HP drivers
    AudioCodecRegWrite(0x1F, 0xC6);

    //w 30 23 88 #DAC_L routed to HPL, DAC_R routed to HPR
    AudioCodecRegWrite(0x23, 0x88);

    //w 30 28 0E #HPL driver unmuted and gain set to 1dB
    AudioCodecRegWrite(0x28, 0x0E);

    //w 30 29 0E # HPR driver unmuted and gain set to 1dB
    AudioCodecRegWrite(0x29, 0x0E);

    //w 30 24 00 #Analog Volume control gain set to 0dB for HPL
    AudioCodecRegWrite(0x24, 0x00);

    //w 30 25 00 # Analog Volume control gain set to 0dB for HPR
    AudioCodecRegWrite(0x25, 0x00);

    //w 30 2E 0B #MICBIAS=AVDD
    AudioCodecRegWrite(0x2E, 0x0B);

    //w 30 30 40 #MIC with Rin=10k
    AudioCodecRegWrite(030, 0x40);

    //w 30 31 40 #CM with Rin=10k
    AudioCodecRegWrite(0x31, 0x40);

    //w 30 40 0C #DAC unmated
    AudioCodecRegWrite(0x40, 0x0C);

    //w 30 51 80 #Power ADC channel
    AudioCodecRegWrite(0x51, 0x80);

    //w 30 52 00 #Unmute ADC channel
    AudioCodecRegWrite(0x52, 0x00);

}

void AudioCodecBeep()
{
	Report("Beep setup \n\r");
    AudioCodecPageSelect(TI3254_PAGE_0);	// Select Page 0

    //Writing Beep length to registers 73,74,75 and 30 being the Codec address.
    //73=49 in hex and so on.

    AudioCodecRegWrite(TI3254_BEEP_LEN_MSB, 0x01);
    AudioCodecRegWrite(TI3254_BEEP_LEN_MID, 0x77);
    AudioCodecRegWrite(TI3254_BEEP_LEN_LSB, 0x00);


    //Now writing Sine and cosine coefficients MSB first then LSB in
    //76,77,78,79
    AudioCodecRegWrite(TI3254_SINE_MSB, 0x23);
    AudioCodecRegWrite(TI3254_SINE_LSB, 0xFB);
    AudioCodecRegWrite(TI3254_COSI_MSB, 0x7A);
    AudioCodecRegWrite(TI3254_COSI_LSB, 0xD7);



    //now that all coefficient settings are done, we can move on to control the volume of left and right
    //channel beep and turn on beep. Assuming Volume of left and right beep= –2dB
    AudioCodecRegWrite(TI3254_RIGHT_BEEP_CTRL_REG, 0x04); // Making gain of right –2dB and making right and left channel independent
    AudioCodecRegWrite(TI3254_LEFT_BEEP_CTRL_REG, 0x84); //Make gain of left channel-2dB and turning on Beep

}



int main()
{   
    long lRetVal = -1;

    BoardInit();

    //
    // Pinmux Configuration
    //
    PinMuxConfig();

    //
    // Initialising the UART terminal
    //
    InitTerm();

    //
    // Initialising the I2C Interface
    //    
    lRetVal = I2C_IF_Open(1);
    if(lRetVal < 0)
    {
        ERR_PRINT(lRetVal);
        LOOP_FOREVER();
    }


    //
    // Configure Audio Codec
    //     
    UART_PRINT("Setting up the beep \r\n");

    AudioCodecBeepConfig();
    AudioCodecBeep();


    //
    // Start the Speaker Task
    //
    //lRetVal = osi_TaskCreate( Speaker, (signed char*)"Speaker",OSI_STACK_SIZE, \
                               NULL, 1, &g_SpeakerTask );
    /*if(lRetVal < 0)
    {
        ERR_PRINT(lRetVal);
        LOOP_FOREVER();
    }*/

    while (1)
    {

    }
}

over 9 years ago

0 Luis Fernando Rodriguez S. over 9 years ago

TI__Guru* 84915 points

Hello, Le Huang,

I couldn't find any setting about the analog power-up. Could you configure the following settings too, please?

Disable weak AVDD to DVDD connection - Page 1 / Register 1
Power up analog blocks; power up AVDD LDO if required - Page 1 / Register 2

Please let me know if the problem persists.

Best regards,
Luis Fernando Rodríguez S.

0 Grace Huang over 9 years ago in reply to Luis Fernando Rodriguez S.

Prodigy 150 points

Hi Luis,

I updated it with your suggestions, but it still does not work.

Here is my updated code.

void AudioCodecBeepConfig() {
	AudioCodecReset(AUDIO_CODEC_TI_3254, NULL);
	Report("Beep config \n\r");

	AudioCodecRegWrite(TI3254_CLK_MUX_REG, 0x07);		// #Set PLL_CLKIN=BLCK and CODEC_CLKIN=PLL_CLK

	AudioCodecRegWrite(TI3254_CLK_PLL_P_R_REG, 0x91);	// #PLL powered up, set PLL variable P=R=1

    AudioCodecRegWrite(TI3254_CLK_PLL_J_REG, 0x20);		// Set PLL variable J=32
    AudioCodecRegWrite(TI3254_CLK_PLL_D_MSB_REG, 0x00);	// # Set PLL variable D(msb)=0
    AudioCodecRegWrite(TI3254_CLK_PLL_D_LSB_REG, 0x00); // D(lsb)=0

    AudioCodecRegWrite(TI3254_AUDIO_IF_1_REG, 0x01); 	// # Mode=I2S, Word length=16, BCLK, WCLK are inputs to codec
    AudioCodecRegWrite(TI3254_CLK_NDAC_REG, 0x84);		// #NDAC powered up and set to 4
    AudioCodecRegWrite(TI3254_CLK_MDAC_REG, 0x84);		// #MDAC powered up and set to 4
    AudioCodecRegWrite(TI3254_DAC_OSR_MSB_REG, 0x00);	// #DOSR=128, DOSR(9:8)=0
    AudioCodecRegWrite(TI3254_DAC_OSR_LSB_REG, 0x80);	// #DOSR(7:0)=128

    AudioCodecRegWrite(TI3254_CLK_NADC_REG, 0x84);    	//#NADC powered up and set to 4
    AudioCodecRegWrite(TI3254_CLK_MADC_REG, 0x84);      //#MADC powered up and set to 4
    AudioCodecRegWrite(TI3254_ADC_OSR_REG, 0x80);    	// AOSR = 128 ((Use with PRB_R1 to PRB_R6, ADC Filter Type A)


    AudioCodecRegWrite(TI3254_DAC_SIG_P_BLK_CTRL_REG, 0x19);  // DAC Signal Processing Block PRB_P19
    AudioCodecRegWrite(TI3254_ADC_SIG_P_BLK_CTRL_REG, 0x4);	// ADC Signal Processing Block PRB_R4
    AudioCodecRegWrite(TI3254_DAC_CHANNEL_SETUP_1_REG, 0xD6);	// Left and Right DAC Channel Powered Up


    AudioCodecPageSelect(TI3254_PAGE_1);		//Select Page 1


    AudioCodecRegWrite(TI3254_PWR_CTRL_REG, 0x08);	// Disabled weak connection of AVDD with DVDD
    AudioCodecRegWrite(TI3254_LDO_CTRL_REG, 0x01);	// Over Current detected for AVDD LDO

    //w 30 21 46 # De-pop, Driver power-on time=600ms, Step time=4ms
    AudioCodecRegWrite(0x21, 0x46);

    //w 30 1F C6 #Power on HP drivers
    AudioCodecRegWrite(0x1F, 0xC6);

    //w 30 23 88 #DAC_L routed to HPL, DAC_R routed to HPR
    AudioCodecRegWrite(0x23, 0x88);

    //w 30 28 0E #HPL driver unmuted and gain set to 1dB
    AudioCodecRegWrite(0x28, 0x0E);

    //w 30 29 0E # HPR driver unmuted and gain set to 1dB
    AudioCodecRegWrite(0x29, 0x0E);

    //w 30 24 00 #Analog Volume control gain set to 0dB for HPL
    AudioCodecRegWrite(0x24, 0x00);

    //w 30 25 00 # Analog Volume control gain set to 0dB for HPR
    AudioCodecRegWrite(0x25, 0x00);

    //w 30 2E 0B #MICBIAS=AVDD
    AudioCodecRegWrite(0x2E, 0x0B);

    //w 30 30 40 #MIC with Rin=10k
    AudioCodecRegWrite(0x30, 0x40);

    //w 30 31 40 #CM with Rin=10k
    AudioCodecRegWrite(0x31, 0x40);

    //w 30 40 0C #DAC unmated
    AudioCodecRegWrite(0x40, 0x0C);

    //w 30 51 80 #Power ADC channel
    AudioCodecRegWrite(0x51, 0x80);

    //w 30 52 00 #Unmute ADC channel
    AudioCodecRegWrite(0x52, 0x00);

}

0 Luis Fernando Rodriguez S. over 9 years ago in reply to Grace Huang

TI__Guru* 84915 points

Hello, Le Huang,

All your registers seems to be in order. They follow the specifications of this application note: www.ti.com/.../slaa446.pdf

So, could you verify if the BCLK and WCLK signals are sent to the codec? The beep generator needs some BCLKs pulses to get initialized.

Best regards,
Luis Fernando Rodríguez S.

Audio

Audio forum

Cannot generate beep from the codec 3254 from audio boostpack