Linux/TLV320AIC3204EVM-K: I2C TLV320AIC3204 evaluation module problem.

Nguyen Hiep

Prodigy 230 points

Part Number: TLV320AIC3204EVM-K

Tool/software: Linux

Hi all,

I try to communicate with Beaglebone Black via I2C2 bus, like below:

+ SCL(P12_16) -> P9_19 on BBB

+ SDA(P12_20) -> P9_20 on BBB

The position of SW1 is "I2C" and SW2 is "LOW". Although the result seem not good, I can send and receive data to MICRO_CHIP_24LC64, slave address is at 0x50:

root@beaglebone:~# i2cset -y 2 0x50 0x00 0x00
root@beaglebone:~#
root@beaglebone:~# i2cget -y 2 0x50 0x00
0x12

When i send data to TLV320AIC304, slave address is at 0x30 ( or 0x18, i don't know exactly), It's error. Terminal is:

root@beaglebone:~# i2cset -y 2 0x30 0x00 0x00
Error: Write failed
root@beaglebone:~# i2cset -y 2 0x18 0x00 0x00
Error: Could not set address to 0x18: Device or resource busy
root@beaglebone:~#

Can everybody help me to check?

Thanks

over 6 years ago

0 Diego Melendez over 6 years ago

TI__Guru 57800 points

Hi, Nguyen,

The 7-bit address of the 'AIC3254 is 0011000, with R/W bit it can be considered as 0x30 or 0x31. It depends on the syntax of your host system how to write the I²C commands. Are you using the 'AIC3254 EVM for this test?. have you verified that the part is correctly configured?.

Regards,

-Diego Meléndez López
Audio Applications Engineer

0 Nguyen Hiep over 6 years ago in reply to Diego Melendez

Prodigy 230 points

Hi Diego,

I use i2c-tool in linux to write and read data. I only use AIC3254EVM for this test, don't connect to USB motherboard, because I want to configure this codec in I2S mode:

Product is link at

Hardware connection:

+ BCLK(P22.3) -> MsASP0_ACLKX (P9_31) on BBB

+ WCLK(P22.7) -> MsASP0_FSX (P9_29)

+ DIN(P22.11) -> MsASP0_AXR0(P9_30)

+ DOUT(P22.13) -> MsASP0_AXR2 (P9_28)

After booting, the TLV320AIC module seem to detect:

root@beaglebone:~# aplay -l

**** List of PLAYBACK Hardware Devices ****

card 0: TLV320AIC32X4 [TI TLV320AIC32X4], device 0: AIC32X tlv320aic32x4-hifi-0 []

Subdevices: 0/1

Subdevice #0: subdevice #0

But I can't configure by I2C. I also check some TLV320 chip pins by voltmeter. SPISELECT is 0V and SW1 is "SCL".

0 Nguyen Hiep over 6 years ago in reply to Nguyen Hiep

Prodigy 230 points

Hi Diego,

I found this problem. In DTS file, when I comment on reg= <0x18>, I can read and write to TLV320AIC slave at address 0x18, but the driver is failed. Log is below:

[ 2.062893] wkup_m3_ipc 44e11324.wkup_m3_ipc: could not get rproc handle
[ 2.246009] davinci_evm sound: ASoC: CODEC DAI tlv320aic32x4-hifi not registered
[ 2.253573] davinci_evm sound: snd_soc_register_card failed (-517)
[ 2.267636] omap_voltage_late_init: Voltage driver support not added
[ 2.275375] PM: Cannot get wkup_m3_ipc handle
[ 2.348455] i2c i2c-2: of_i2c: invalid reg on /ocp/i2c@4819c000/tlv320aic32x4@18

My DTS file is:

&i2c2 {
pinctrl-names = "default";
pinctrl-0 = <&i2c2_pins>;

status = "okay";
clock-frequency = <100000>;

tlv320aic32x4: tlv320aic32x4@18 {
compatible = "ti,tlv320aic32x4";
reg = <0x18>;
status = "okay";
};
};

Hope to hear feedback from you,

Regards,

Hiep Nguyen

0 Diego Melendez over 6 years ago in reply to Nguyen Hiep

TI__Guru 57800 points

Hi, Nguyen,

Thanks for the additional comments. Unfortunately, we are no providing driver support, we can help with the general device configuration and register setting, but we cannot support the driver debugging or configuration.

Best Regards,

-Diego Meléndez López
Audio Applications Engineer

0 Nguyen Hiep over 6 years ago in reply to Diego Melendez

Prodigy 230 points

Hi Diego,

I fixed that by add option -f into i2cset or i2cget command. Like below:

root@beaglebone:~# i2cset -y -f 2 0x18 0x00 0x01
root@beaglebone:~# i2cget -y -f 2 0x18 0x00
0x01
root@beaglebone:~#

Now, I want to configure to I2S-MODE with hardware connected to beaglebone above via I2C2 bus. I face some problem:

1, Routing and Widget in DTS file. It seem error.

[ 2.558577] tlv320aic32x4 2-0018: ASoC: no source widget found for CM_R
[ 2.565270] tlv320aic32x4 2-0018: ASoC: Failed to add route CM_R -> 10 kOhm -> CM_R to Right Mixer Negative Resistor
[ 2.575861] tlv320aic32x4 2-0018: ASoC: no source widget found for CM_R
[ 2.582523] tlv320aic32x4 2-0018: ASoC: Failed to add route CM_R -> 20 kOhm -> CM_R to Right Mixer Negative Resistor
[ 2.593108] tlv320aic32x4 2-0018: ASoC: no source widget found for CM_R
[ 2.599767] tlv320aic32x4 2-0018: ASoC: Failed to add route CM_R -> 40 kOhm -> CM_R to Right Mixer Negative Resistor
[ 2.627347] tlv320aic32x4 2-0018: ASoC: no source widget found for CM_L
[ 2.634017] tlv320aic32x4 2-0018: ASoC: Failed to add route CM_L -> 10 kOhm -> CM_L to Left Mixer Negative Resistor
[ 2.644519] tlv320aic32x4 2-0018: ASoC: no source widget found for CM_L
[ 2.651180] tlv320aic32x4 2-0018: ASoC: Failed to add route CM_L -> 20 kOhm -> CM_L to Left Mixer Negative Resistor
[ 2.661677] tlv320aic32x4 2-0018: ASoC: no source widget found for CM_L
[ 2.668336] tlv320aic32x4 2-0018: ASoC: Failed to add route CM_L -> 40 kOhm -> CM_L to Left Mixer Negative Resistor

2, Can you give me some example or document, how to use TLV320AIC in I2S Mode. using Audio Pin input: WCLK, BCLK and DIN.

Many Thanks,

Hiep Nguyen

0 Diego Melendez over 6 years ago in reply to Nguyen Hiep

TI__Guru 57800 points

Hi, Nguyen,

You should be able to connect the I²S signals through header P22, please refer to the schematic of the daughter-board EVM that is available in the user's guide. By default, the 'AIC3254 is configured to operate in 16-bit I²S Slave mode, so it only would be a matter of configuring the internal clock dividers to accept your host device clocks. I can help with the divider configuration if you provide your MCLK and I²S clock frequencies.

Best Regards,

-Diego Meléndez López
Audio Applications Engineer

0 Nguyen Hiep over 6 years ago in reply to Diego Melendez

Prodigy 230 points

Hi Diego,

I can hear sound from the device now. But the sound seem not clear. I think, the reason is MCLK, BCLK, WCLK frequencies like you said.

While the codec was working in USB mode, I measured MCLK frequencies. It is 11,2898 MHz. So, I must set this value or I can use another value because I want to use 24MHz clock from beaglebone.

My setting is 16 bit stereo, 2 channels, WCLK =44,1 KHz and BCLK=1,4112 MHz, MCLK=24 MHz, from McASP0 in the Beaglebone provide to the codec.

At the present, I am using an external MCLK clock( frequencies is at 11,2898 MHz). I don't know how to configure the internal clock for 24 MHz. Configure of the internal clock only depend on MCLK frequencies or both MCLK, BCLK and WCLK frequencies. Attached below is my script which setup the codec in I2S mode.

codec_setup.txt

#!/bin/bash
echo "========================================================="
echo "          TLV320AIC codec Init for I2S-MODE"
echo "========================================================="

###############################################
# Software Reset
###############################################
#
# Select Page 0
i2cset -y -f 2 0x18 0x00 0x00
#
# Initialize the device through software reset
i2cset -y -f 2 0x18 0x01 0x01
#

###############################################
# Clock Settings
# ---------------------------------------------
# The codec receives: MCLK = 11,2896 MHz,
# BLCK = 1,4112 MHz, WCLK = 44,1 kHz
###############################################
#
# Select Page 0
i2cset -y -f 2 0x18 0x00 0x00
#
# MCLK as PLL_input; PLL_CLK as CODEC_CLKIN
i2cset -y -f 2 0x18 0x04 0x03
#
# J = 4; P = 1; D = 0, R =1 PLL enabled
i2cset -y -f 2 0x18 0x05 0x91
i2cset -y -f 2 0x18 0x06 0x04
#
# NDAC = 1, MDAC = 1, dividers powered on
i2cset -y -f 2 0x18 0x0b 0x81
i2cset -y -f 2 0x18 0x0c 0x81

###############################################
# Signal Processing Settings
###############################################
#
# Select Page 0
i2cset -y -f 2 0x18 0x00 0x00
#
# Set serial interface at I2S and 16-bit
i2cset -y -f 2 0x18 0x1b 0x00
#
# Set the DAC Mode to PRB_P8
i2cset -y -f 2 0x18 0x3c 0x08

###############################################
# Initialize Codec
###############################################
#
# Select Page 1
i2cset -y -f 2 0x18 0x00 0x01
#
# Disable weak AVDD in presence of external
# AVDD supply
i2cset -y -f 2 0x18 0x01 0x08
#
# Enable Master Analog Power Control
i2cset -y -f 2 0x18 0x02 0x00
#
# Set the REF charging time to 40ms
i2cset -y -f 2 0x18 0x7b 0x01

###############################################
# Playback Setup
###############################################
#
# Select Page 1
i2cset -y -f 2 0x18 0x00 0x01
#
# De-pop
i2cset -y -f 2 0x18 0x14 0x25
#
# Set the Input Common Mode to 0.9V and Output Common Mode for Headphone to
# Input Common Mode
# w 30 0a 00
#
# Route LDAC/RDAC to HPL/HPR
i2cset -y -f 2 0x18 0x0c 0x08
i2cset -y -f 2 0x18 0x0d 0x08
#
# Power up HPL/HPR
i2cset -y -f 2 0x18 0x09 0x30
#
# Unmute HPL/HPR driver, 0dB Gain
i2cset -y -f 2 0x18 0x10 0x00
i2cset -y -f 2 0x18 0x11 0x00
#
# Select Page 0
i2cset -y -f 2 0x18 0x00 0x00
#
# Power up LDAC/RDAC
i2cset -y -f 2 0x18 0x3f 0xd6
#
# Unmute LDAC/RDAC
i2cset -y -f 2 0x18 0x40 0x00
#
echo "========================================================="
echo "                         DONE                            "
echo "                     HIEP NGUYEN                         "
echo "========================================================="

Can you give me some advises for MCLK as 24 MHz ?

Thanks and Regards,

Hiep Nguyen

0 Nguyen Hiep over 6 years ago in reply to Nguyen Hiep

Prodigy 230 points

Hi Diego,
I try to configure MCLK at 24 MHz. Like below:
###############################################
# Clock Settings
# ---------------------------------------------
# The codec receives: MCLK = 24 MHz,
# BLCK = 1,4112 MHz, WCLK = 44,1 kHz
###############################################
#
# Select Page 0
i2cset -y -f 2 0x18 0x00 0x00
#
# Power up the NDAC divider with value 1
i2cset -y -f 2 0x18 0x0b 0x81
# Power up the MDAC divider with value 4
i2cset -y -f 2 0x18 0x0c 0x84
#
# Program the OSR of DAC to 136
i2cset -y -f 2 0x18 0x0d 0x00
i2cset -y -f 2 0x18 0x0e 0x88

This setting can work with 24 MHz at MCLK Pin. But the sound is noise. Hope to hear your opinion on this case.
Regards,
Hiep Nguyen

0 Diego Melendez over 6 years ago in reply to Nguyen Hiep

TI__Guru 57800 points

Hi, Nguyen,

Thanks for the feedback. As you mentioned in your previous post, the configuration of the clocks seems to be the issue. For your current application, the PLL is required to generate an internal Audio system clock from the 24MHz clock. Please try below PLL and clock divider configurations:

PLL mode = 0
PLL Parameters:
- P = 2
- R = 1
- J = 7
- D = 560
Dividers:CODEC_CLKIN = PLL_CLK
- MADC/MDAC = 3
- NADC/NDAC = 3
- AOSR/DOSR = 128

Best Regards,

-Diego Meléndez López
Audio Applications Engineer

0 Nguyen Hiep over 6 years ago in reply to Diego Melendez

Prodigy 230 points

Hi Diego,

As your suggestion above, I try configuring like below:

###############################################
# Clock Settings
# ---------------------------------------------
# The codec receives: MCLK = 24 MHz,
# BLCK = 1,4112 MHz, WCLK = 44,1 kHz
###############################################
#
# Select Page 0
i2cset -y -f 2 0x18 0x00 0x00
#
# MCLK as PLL_input; PLL_CLK as CODEC_CLKIN
i2cset -y -f 2 0x18 0x04 0x03
#
# P = 2; R = 1; J = 7; D = 560; PLL enabled
i2cset -y -f 2 0x18 0x05 0xa1
i2cset -y -f 2 0x18 0x06 0x07
i2cset -y -f 2 0x18 0x07 0x02
i2cset -y -f 2 0x18 0x08 0x30
#
# NDAC = 3, MDAC = 3; dividers powered on
i2cset -y -f 2 0x18 0x0b 0x83
i2cset -y -f 2 0x18 0x0c 0x83

# Program the OSR of DAC to 128
i2cset -y -f 2 0x18 0x0d 0x00
i2cset -y -f 2 0x18 0x0e 0x80

But the sound also hear noise when I play .mp3 music. I measure frequencies at MCLK, BCLK, MCLK on the codec. The value is right.

I will confirm again:

+ The setting from Beaglebone is 16 bit, WCLK=44,1 KHz, BCLK=1,4112 MHz, MCLK=24 MHz. So, I tried it in 2 cases: MCLK(on BBB) -> PLL divider in codec and direct into MCLK.

+ I found in the TLV320AIC application example. The frequencies of BCLK is 2,822 MHz. It mean the codec is working on 32 bit stereo. I can't divide BCLK clock from Beaglebone into 2,822 MHz. So, I use 1,4112 MHz for 16 bit stereo. I don't know that is reason why the sound hear noise. I'm working on am335x-evm-linux-04.01.00.06 ( linux header 4.9.41). Here is my tlv320aic32x4 hardware params:

static int tlv320aic32x4_hw_params(struct snd_pcm_substream *substream,
struct snd_pcm_hw_params *params)
{
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct snd_soc_dai *codec_dai = rtd->codec_dai;
struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
struct snd_soc_card *soc_card = rtd->card;
int ret = 0;
struct platform_device *pdev = to_platform_device(soc_card->dev);
unsigned int bclk_freq = evm_get_bclk(params);
unsigned sysclk = ((struct snd_soc_card_drvdata_davinci *)
snd_soc_card_get_drvdata(soc_card))->sysclk;

ret = snd_soc_dai_set_clkdiv(cpu_dai, 1, sysclk/bclk_freq);
if (ret < 0) {
dev_err(&pdev->dev, "can't set CPU DAI clock divider %d\n",
ret);
return ret;
}

printk("TLV320AIC32X4 hw params\n");
printk("sysclk=%d\n", sysclk);
printk("bclk_freq=%d\n", bclk_freq);/* set the CPU system clock */

ret = snd_soc_dai_set_sysclk(cpu_dai, 0, sysclk, SND_SOC_CLOCK_OUT);
if (ret < 0)
return ret;

/* set the codec system clock */
ret = snd_soc_dai_set_sysclk(codec_dai, 0, sysclk, SND_SOC_CLOCK_OUT);
if (ret < 0)
return ret;

return ret;
}

Attached are 2 scripts which configure codec in 2 cases as I said.

24HMz_PLL.txt

#!/bin/bash
echo "========================================================="
echo "          TLV320AIC codec Init for I2S-MODE"
echo "========================================================="

###############################################
# Software Reset
###############################################
#
# Select Page 0
i2cset -y -f 2 0x18 0x00 0x00
#
# Initialize the device through software reset
i2cset -y -f 2 0x18 0x01 0x01
#

###############################################
# Clock Settings
# ---------------------------------------------
# The codec receives: MCLK = 24 MHz,
# BLCK = 1,4112 MHz, WCLK = 44,1 kHz
###############################################
#
# Select Page 0
i2cset -y -f 2 0x18 0x00 0x00
#
# MCLK as PLL_input; PLL_CLK as CODEC_CLKIN
i2cset -y -f 2 0x18 0x04 0x03
#
# P = 2; R = 1; J = 7; D = 560; PLL enabled
i2cset -y -f 2 0x18 0x05 0xa1
i2cset -y -f 2 0x18 0x06 0x07
i2cset -y -f 2 0x18 0x07 0x02
i2cset -y -f 2 0x18 0x08 0x30
#
# NDAC = 3, MDAC = 3; dividers powered on
i2cset -y -f 2 0x18 0x0b 0x83
i2cset -y -f 2 0x18 0x0c 0x83

# Program the OSR of DAC to 128
i2cset -y -f 2 0x18 0x0d 0x00
i2cset -y -f 2 0x18 0x0e 0x80
###############################################
# Signal Processing Settings
###############################################
#
# Select Page 0
i2cset -y -f 2 0x18 0x00 0x00
#
# Set serial interface at I2S and 16-bit
i2cset -y -f 2 0x18 0x1b 0x00
#
# Set the DAC Mode to PRB_P8
i2cset -y -f 2 0x18 0x3c 0x08

###############################################
# Initialize Codec
###############################################
#
# Select Page 1
i2cset -y -f 2 0x18 0x00 0x01
#
# Disable weak AVDD in presence of external
# AVDD supply
i2cset -y -f 2 0x18 0x01 0x08
#
# Enable Master Analog Power Control
i2cset -y -f 2 0x18 0x02 0x00
#
# Set the REF charging time to 40ms
i2cset -y -f 2 0x18 0x7b 0x01

###############################################
# Playback Setup
###############################################
#
# Select Page 1
i2cset -y -f 2 0x18 0x00 0x01
#
# De-pop
i2cset -y -f 2 0x18 0x14 0x25
#
# Set the Input Common Mode to 0.9V and Output Common Mode for Headphone to
# Input Common Mode
# w 30 0a 00
#
# Route LDAC/RDAC to HPL/HPR
i2cset -y -f 2 0x18 0x0c 0x08
i2cset -y -f 2 0x18 0x0d 0x08
#
# Power up HPL/HPR
i2cset -y -f 2 0x18 0x09 0x30
#
# Unmute HPL/HPR driver, 0dB Gain
i2cset -y -f 2 0x18 0x10 0x00
i2cset -y -f 2 0x18 0x11 0x00
#
# Select Page 0
i2cset -y -f 2 0x18 0x00 0x00
#
# Power up LDAC/RDAC
i2cset -y -f 2 0x18 0x3f 0xd6
#
# Unmute LDAC/RDAC
i2cset -y -f 2 0x18 0x40 0x00
#
echo "========================================================="
echo "         SETTING ------> DONE                            "
echo "         Writen by:  HIEP NGUYEN                         "
echo "========================================================="

24MHz_direct_to_MCLK.txt

#!/bin/bash
echo "========================================================="
echo "          TLV320AIC codec Init for I2S-MODE"
echo "========================================================="

###############################################
# Software Reset
###############################################
#
# Select Page 0
i2cset -y -f 2 0x18 0x00 0x00
#
# Initialize the device through software reset
i2cset -y -f 2 0x18 0x01 0x01
#

###############################################
# Clock Settings
# ---------------------------------------------
# The codec receives: MCLK = 24 MHz,
# BLCK = 1,4112 MHz, WCLK = 44,1 kHz
###############################################
#
# Select Page 0
i2cset -y -f 2 0x18 0x00 0x00
#
# Power up the NDAC divider with value 1
i2cset -y -f 2 0x18 0x0b 0x81
# Power up the MDAC divider with value 4
i2cset -y -f 2 0x18 0x0c 0x84
#
# Program the OSR of DAC to 136
i2cset -y -f 2 0x18 0x0d 0x00
i2cset -y -f 2 0x18 0x0e 0x88

###############################################
# Signal Processing Settings
###############################################
#
# Select Page 0
i2cset -y -f 2 0x18 0x00 0x00
#
# Set serial interface at I2S and 16-bit
i2cset -y -f 2 0x18 0x1b 0x00
#
# Set the DAC Mode to PRB_P8
i2cset -y -f 2 0x18 0x3c 0x08

###############################################
# Initialize Codec
###############################################
#
# Select Page 1
i2cset -y -f 2 0x18 0x00 0x01
#
# Disable weak AVDD in presence of external
# AVDD supply
i2cset -y -f 2 0x18 0x01 0x08
#
# Enable Master Analog Power Control
i2cset -y -f 2 0x18 0x02 0x00
#
# Set the REF charging time to 40ms
i2cset -y -f 2 0x18 0x7b 0x01

###############################################
# Playback Setup
###############################################
#
# Select Page 1
i2cset -y -f 2 0x18 0x00 0x01
#
# De-pop
i2cset -y -f 2 0x18 0x14 0x25
#
# Set the Input Common Mode to 0.9V and Output Common Mode for Headphone to
# Input Common Mode
# w 30 0a 00
#
# Route LDAC/RDAC to HPL/HPR
i2cset -y -f 2 0x18 0x0c 0x08
i2cset -y -f 2 0x18 0x0d 0x08
#
# Power up HPL/HPR
i2cset -y -f 2 0x18 0x09 0x30
#
# Unmute HPL/HPR driver, 0dB Gain
i2cset -y -f 2 0x18 0x10 0x00
i2cset -y -f 2 0x18 0x11 0x00
#
# Select Page 0
i2cset -y -f 2 0x18 0x00 0x00
#
# Power up LDAC/RDAC
i2cset -y -f 2 0x18 0x3f 0xd6
#
# Unmute LDAC/RDAC
i2cset -y -f 2 0x18 0x40 0x00
#
echo "========================================================="
echo "         SETTING ------> DONE                            "
echo "         Writen by:  HIEP NGUYEN                         "
echo "========================================================="

Hope to hear feedback from you soon,

Best Regards,

Hiep Nguyen

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Linux/TLV320AIC3204EVM-K: I2C TLV320AIC3204 evaluation module problem.