Team,
More questions about PCM4202 cropping up as my customer is on the verge of releasing boards to production:
In my application I adjust the phase of my incoming data based the phase of my transmitter relative to the left right clock. The phase adjustment is at the resolution of the bit clock (1/64 of the L/R clock). The *RST line of the PCM4202 is tied to 3.3V
The system works as expected most of the time however I have had some power cycles where the phase may be off on one or more of the a/d converters (6 total on the board). This may be related to the power rails no fully discharging or voltage rises being inconsistent resulting in each of the PCM4202 resetting at different times.
I can turn power off and back on to correct the problem. I have also been able to create the error by “tapping” ground to the *RST pin while the system is running.
Is the A/D sampling (at the 48KHz rate) asynchronous with the left right clock (different phase depending on when the reset occurs)?
If *RST is tied high is the phase determined by when reset occurs based Vdd and Vcc ?
If I drive the reset signal to all the converters on the board will they be in phase with each other?
What is the best way to guarantee a known phase from all the converters?
Thanks,
Brian
