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TAS2770EVM: Trouble Using PDM Mode

Part Number: TAS2770EVM

I'm working with the TAS2770EVM and trying to use it in PDM mode. I'm generating the PDM data and clock in an FPGA and sending it to the amp via the PDM header on the eval board. Additionally, I've set what appear to be the appropriate registers to operate using PDM playback via the I2C interface. The registers I'm setting are summarized below. The PDM clock I'm using is 6.144MHz and the data is half that. Not sure what I'm doing wrong though.

w 82 03 b0 # setting the PB_CFG0 register PB_SRC to 1 for PDM playback, PB_PDM_SRC to 0, and PDM_MAP to 1 for PDM playback

w 82 08 04 # setting CLASSD_sync to 0, and PDM_RATE to (bits 3 & 2) to 01 for 5.08-6.76 MHz

w 82 09 08 # PDM_EDGE1 is set to 0 for rising edge, PDM_SLV1 is set to 0 to put it in slave mode, PDM_CLK1 is set to 1, and PDM_GATE1 is set to 0.
w 82 02 0c # turn on the output
w 82 30 00

  • This morning I tried putting the amp into PDM master mode and probed the PDMCK pin as a sanity check. I'm able to get a 2.59ish MHz clock out, however when I try to change the clock rate using register 0x08 the register takes the correct value, but the clock output on the PDMCK pin never changes. This seems very odd.
  • Hi Thomas,

    You can try by opening the I2C monitor withing PPC3, click on Log and enable the recorder. Then you can do the necessary configurations and save the I2C activity from the monitor. The resulting script should configure the device the same way you did on the GUI.

    Best regards,
    -Ivan Salazar
    Applications Engineer - Low Power Audio & Actuators
  • Hi Ivan,

    I'm not even using the GUI to configure anything at this point because it doesn't seem to work very well. I have just been writing the registers directly using I2C. My first post outlined the I2C commands I have been using to write the registers. I've also confirmed that they are written correctly using the GUI. Do you have a example program that puts the system into PDM mode correctly?

    -Tom
  • Hi Tom,

    I'll check about PDMCK frequency change on master mode.
    Can you share captures of PDM clock and data signals you're sending to the device? I'll setup some test environment to obtain a script you can use as baseline.

    Best regards,
    -Ivan Salazar
    Applications Engineer - Low Power Audio & Actuators
  • Hi Tom,

    I'm following up on this thread. Did you got a chance to capture the PDM clock signals you're sending to the device?
    Are you still having issues with PDM interface?

    Best regards,
    -Ivan Salazar
    Applications Engineer - Low Power Audio & Actuators
  • Hi Ivan,

    We resolved our own issue, thank you for the help.

    -Tom