I'm working with the TAS2770EVM and trying to use it in PDM mode. I'm generating the PDM data and clock in an FPGA and sending it to the amp via the PDM header on the eval board. Additionally, I've set what appear to be the appropriate registers to operate using PDM playback via the I2C interface. The registers I'm setting are summarized below. The PDM clock I'm using is 6.144MHz and the data is half that. Not sure what I'm doing wrong though.
w 82 03 b0 # setting the PB_CFG0 register PB_SRC to 1 for PDM playback, PB_PDM_SRC to 0, and PDM_MAP to 1 for PDM playback
w 82 08 04 # setting CLASSD_sync to 0, and PDM_RATE to (bits 3 & 2) to 01 for 5.08-6.76 MHz
w 82 09 08 # PDM_EDGE1 is set to 0 for rising edge, PDM_SLV1 is set to 0 to put it in slave mode, PDM_CLK1 is set to 1, and PDM_GATE1 is set to 0.
w 82 02 0c # turn on the output
w 82 30 00