TAS5733L: Low power mode with PVDD in shutdown

TISL

Part Number: TAS5733L

Dear e2e support,

To minimize the power consumption of our IC, are we allowed to shutdown the supply on PVDD (just keeping AVDD/DVDD)?

If yes, what would be the minimum expected quiescent current on AVDD/DVDD, in this case?

In any case, is it possible to be under a very low power mode, with the I2S bus that continues to work properly (as MCLK, SCLK, LRCLK, SDIN are used by other I2S devices in the application)?

Regards,

over 5 years ago

0 Shawn Zheng over 5 years ago

TI__Mastermind 24835 points

Hi Sebastien,
The AVDD/DVDD current is around 49mA in normal mode, and it decreases to ~23mA when driving RST to low.
Best regards,
Shawn Zheng

0 TISL over 5 years ago in reply to Shawn Zheng

TI__Expert 3785 points

Hi Shawn,

Thanks for your feedback.

My question was more related to PVDD:

1- are we allowed to shutdown PVDD (I mean not provide any supply on it)?

2- on that case, should we expect the same quiescent current on AVDD/DVDD as if we are in RESET?

3- what would be the consequences on the I2S bus? Does it continue to work properly?

Regards,

0 Shawn Zheng over 5 years ago in reply to TISL

TI__Mastermind 24835 points

Hi Sebastien,
See my answers below:
Q1: PVDD is allowed to shut down, please let AMP enter shutdown mode(by writing register)
Q2: No, the current consumption on AVDD/DVDD is lower with RST in low voltage.
Q3: Digital part still works after configuration. When PVDD is applied and AMP exits shutdown mode, the output is recovered.
You could try this on the TAS5733L EVM.
Best regards,
Shawn Zheng

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TAS5733L: Low power mode with PVDD in shutdown