Audio team,
One of our customers using TPA3112D1 is seeing that GVDD is around 5 V to 5.2 V instead of the expected 7 V on multiple separate projects.. AVCC is measured at 21 V. AVCC is supplied from PVCC through a 100 kOhm resistor to avoid high slew rate. PVCC is 24 V.
GVDD is connected to a voltage divider for PLIMIT (actually a digipot) with a total resistance of 10 kOhm.
Do you know why they would see GVDD at a lower voltage like this? It is causing problems with PLIMIT being triggered unnecessarily.
Thanks,
Darren