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PCM3070: PCM3070 headphone output application isseu

Part Number: PCM3070

Hi teams

This is Gabriel Xu from South China OEM team, my customer is using PCM3070 in new design and they need to use headphone output function.

The input signal is single ended from IN1L and IN1R, and the output pin is HPL and HPR. The output is single ended stereo configuration.

They wants to know how to configure the resister to achieve this? Do we have any demo about such application?

Customer register setting is shown below:

I also want to know what is PRB mode? How to set up the device operate in PRB mode? Thanks.

  • Hi, Gabriel,

    The application you are trying to achieve is possible, and there are different ways to achieve it. This device has an internal bypass amplifier that can be used to directly connect the analog input to the HP outputs. However, under this configuration no signal processing would be possible. If you want to use one of the processing blocks (PRB), the only way to achieve this is to use the digital loopback o this device, which ties the output of the ADC to the DAC input, allowing the use of both ADC and DAC processing blocks.  Please confirm what would be the preferred option for customer.

    Can you please share Customer Register setting in text format? That way I can check and modify it to meet the application requirements.

    Best Regards,

      -Diego Meléndez López
       Audio Applications Engineer

  • Hi Diego

    Thanks for your comments. Customer prefers to output the signal through processing flow.

    I will send you the TXT file later.

    I also want to know are external clock source is necessary for PMC3070? Do it have internal clock source?

    The customer is using total analog input and they want to know under this condition are MCLK and external clock is necessary?

    Thanks in advance.

  • Hi teams

        we are the customer,we want the input signal is single ended from IN1L and IN1R,and headphone output.

    Now we use GDE desige a demo And our hardware and  register init is as follow.We find we need BCLK it  can work,if only MCLK it can not work.We do not know why.We not use I2S,So we think we just give DSP a clock is enough(we use MCLK as clk input).Is we register  have problem or hardware need some change?

    PCM3070.PDF

    6523.base_main_Rate44_pps_driver.h

  • If you can give us a demo IN1 input and headphone output it is better!
  • Hi, Gabriel and Customer,

    For an application where the Codec only receives the MCLK, as this where the I²S interface is no used, it is necessary to configure the codec as Master (BCLK and WCLK as outputs, enable BLCK divider) so internally the codec engine can detect the audio clocks and start normal operation. In PPS, the codec is configured as Slave by default, that's why is working when BCLK is provided, so you need to adjust the register values manually in the System Settings Code to configure it as Master. Please configure Register 27 of Page 0 as 0x0C and Register 30 of Page 0 as 0x90. This is done by adding the following lines to the mentioned System Settings Code in PPS:

    reg[ 0][0x1B] = 0x0C ; BCLK and WCLK as Outputs
    reg[ 0][0x1E] = 0x90 ; BCLK Divider

    The System Settings code is available in the properties window of the Framework block PPS.

    Best Regards,

      -Diego Meléndez López
       Audio Applications Engineer