This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TLV320AIC3254: AIC3254 loud hissing/noise from ADC with certain devices

Part Number: TLV320AIC3254

Dear Ti. 

We are having issues with our product which contains the AIC3254 CODEC. The speaker product using the ADC - miniDSP - DAC to provide processing in AUX mode for the speaker. The speaker is efficient and the amplifier has a high-gain but the background hiss is normally at a fairly acceptable level with most devices. 

However, with certain devices, namely Macbooks from around 2012/2011 and iphone 4/4S, the speaker outputs a very loud hiss/noise when connected in AUX mode. I have analysed the output signal from the Macbook and iphone 4S and found a lot of noise between 100-500kHz in the order of 100mV or so all the time. 

The codec input has a 10k + 470pF low pass filter on the input. However, this doesn't seem to be enough to stop the HF noise from getting through. Could this be anti-aliasing noise from the sigma-delta DAC on the Macbook/iphone which is coupling back into the audio band when sampled by the ADC in the 3254? 

Is there anything I can do in software to improve or reduce this effect? The hardware is in production so difficult to add more filtering any time soon. 

Looking forward to your reply. 

David

  • Hello David,

    That is a fair amount of noise coming from the Macbook and iPhone.
    What is your ADC Fs and AOSR? which Decimation filter are you using on the AIC3254?
    Can you provide a FFT of the MacBook output? Also for the idle noise you are seeing from the ADC when connected to the MacBook?

    best regards,
    -Steve Wilson
  • Its a 4x decimation filter. CODEC is working at 44100Hz sample rate with 5.6448Mhz input clk and PLL running at 90Mhz. and here are some applicable settings I'm using:

    // #### setup clock
    0,0x00, // page 0
    60,0x00, //; Use miniDSP_A for signal processing
    61,0x00, //; 8x Interpolation
    17,0x08, //; 4x Decimation
    23,0x04, // miniDSP decimation factor = 4
    15,0x03, // miniDSP_D instruction control settings
    16,0x88, // miniDSP_D instruction control settings
    21,0x03, // miniDSP_A instruction control settings
    22,0x88, // miniDSP_A instruction control settings
    0,0x08, //; page 8
    1,0x04, // adaptive mode for ADC
    0,0x2C, //; adaptive mode for DAC
    1,0x04, //
    0,0x00, //; page 0
    5,0x91, //; P=1, R=1, J=8
    0x1A,0xA0, // Clock out = MCLK / 32 = 156kHz
    0x37,0x06, // MISO is clock output
    0x34,0x0C, // GPIO is output (low)
    //#### need to set PLL J=16 because of half speed clock input! ######
    6,0x10, //; J=16 (MSB)
    7,0x00, //; J=16 (LSB)
    8,0x00, //; PLL_clkin = MCLK, codec_clkin = PLL_CLK, PLL on
    4,0x03, //; MDAC = 8, divider powered on
    12,0x88, //; DOSR = 128 (MSB)
    13,0x00, //; DOSR = 128 (LSB)
    14,0x80, //; NADC = 2, divider powered off
    18,0x02, //; MADC = 8, divider powered on
    19,0x88, //; AOSR = 128
    20,0x80, //; NDAC = 2, divider powered on
    11,0x82, //
    //##### custom code for outputting BCLK and WCLK
    28,0x01, // 1 BCLK data offset
    29,0x01, // BCLK is derived from DAC_MOD_CLK
    30,0x81, // power up divider, set to 1
    27,0x0C, // BCLK and WCLK is output from the device
    //27,0x00, // BCLK and WCLK is input from BTM
    //##### Enable GPIO
    48,0x04, // int1 = miniDSP int
    52,0x14, // enable GPIO = int1

    //##### analogue intput config
    0,0x01, // page 1
    51,0x00, //; Mic Bias disabled
    52,0x40, //; Route IN2L to LEFT_P with 20K input impedance; Route CM1L to LEFT_M with 10K input impedance; Route IN2R to RIGHT_P with 10K input impedance; Route IN1L to LEFT_P with 10K input impedance
    54,0x40, //; Route CM1L to LEFT_M with 20K input impedance
    55,0x40, //; Route IN1R to RIGHT_P with 20K input impedance
    57,0x40, //; Route CM1R to RIGHT_M with 20K input impedance
    58,0x00, // disable inputs IN1L and IN1R
    //59,0x00, //; Enable MicPGA_L Gain Control, 0dB
    //60,0x00, //; Enable MicPGA_R Gain Control, 0dB
    0,0x00, // page 0
    81,0xC0, //; Power up LADC/RADC
    82,0x88, //; mute LADC/RADC

    Below are some screenshots of the Macbook output and FFT. There is no noise problem with other portable speakers I've tested with. So it's either a lack of filtering (which should be covered and advised in your documentation) or a problem with the ADC settings. 

    I hope you can offer a solution. The audible noise is VERY bad - David

  • I have done some more investigating. I tried the EVM and the audible noise wasn't there. So I started looking and what additional components there were on the ADC inputs in my circuit compared to the EVM. I started removing components until I found the cultrit.

    It was a 10nF capacitor I place between the jack audio inputs and ground for ESD/EMC/EMI purposes.

    I placed two 10nF capacitors between IN1L and ground and IN1R and ground on the EVM (after the 1uF caps this time) and exactly the same noise was heard. It seems to be creating an oscillation at 877kHz. Its so strange, it doesn't occur with any other phones or music sources and these caps have never caused a problem before. Obviously moving forward I will change/remove this cap. But is there anything I can do in software to fix this? 

    Here is how the FFT and noise changes when the caps are added.

  • David,

    Have you tried changing the input impedance? There could be a chance that the input impedance is playing a role in this Capacitor oscillation issue. Its a long shot, but I can't really think of another way to modify the input that might help resolve this issue.
    best regards,
    -Steve Wilson