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Linux/TLV320AIC3100: tlv320aic3100 codec clock dividers for i2s format with sample rate 22050

Part Number: TLV320AIC3100

Tool/software: Linux

Hello TI,

I have custom board with am335x interfaced with tlv320aic3100. With linux running on it.

MCLK is at 24MHz, codec is in slave mode.

The table in the tlv320aic31xx.c driver file for 22050 :

static const struct aic31xx_rate_divs aic31xx_divs[] = {
        /* mclk/p    rate  pll: j     d        dosr ndac mdac  aors nadc madc */
        /* 22.05k rate */
        {12000000,  22050,      7, 5264,        128,  16,  2,   128,  16,  2},
        {12000000,  22050,      8, 4672,        128,  12,  3,   128,  12,  3},
        {12500000,  22050,      7, 2253,        128,  16,  2,   128,  16,  2},

This setup works fine if codec format is setup to dsp. And audio is normal when played at 22050 hz from pcm file using aplay.

But same setup with codec format set to i2s, the audio played feels like played with a higher speed, it is not normal.

Can you please help me out here to find the issue. is there anything needs to be changed in clock divider table for i2s ?

But at 44100 hz format this is the table:

        /* 44.1k rate */
        {12000000,  44100,      7, 5264,        128,   8,  2,   128,   8,  2},
        {12000000,  44100,      8, 4672,        128,   6,  3,   128,   6,  3},
        {12500000,  44100,      7, 2253,        128,   8,  2,   128,   8,  2},

in this case both dsp and i2s formats work fine.

Please help.

thanks,

aniket

  • Aniket,

    those tables are for MCLK = 12Mhz. the values will need to be adjusted for MCLK = 24Mhz.

    There shouldn't be a difference beween DSP and I2S mode assuming that the clocks don't change. can you give me more information about this?

    best regards,
    -Steve Wilson