For your Information: We have the same problem. We poll the Register 0x13 and 0x14 of the SRC every 20ms. A significant number of chips (about 10%) tend not to release the SDA bus. The error occurs very rarely or not at all when no input signal is present. If an input signal is present, the error occurs once every hour to once every three days (individual differences of the chips). We are able to partially cover the error by inserting additional SCL clocks. Ultimately, the error can only be solved by renewing the faulty chips.
Would the SRC work more stable with SPI?
