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TLV320AIC3107: different DC bias between CODEC ADC

Part Number: TLV320AIC3107

Hello,

We are running test trying to determinate DC bias on each ADC. test set up

Fmaster clock 12.8MHZ

Sampling rate 10KHZ

2 channel I2S 16 bit

PGA disable

Line/mic inputs disable

we are seeing relativity large variance in DC bias between two ADC channels, sometimes up to 8 bit  ie ADC CH0 DC bias is around +127 and second channel ADC around -128

Could you please advise what is acceptable dc bias offset from 0 and what is acceptable asymmetry between two ADC in same chip?

 Thank you,

  • Hello,

    The TLV320AIC3107 ADCs are primarily used for AC voltage measurements and while it's possible to configure them for DC voltage measurements the DC performance specifications are not directly specified.  Can you confirm how the input connections are being made during your measurements?

    Is the goal to use the ADC for DC measurements or AC audio measurements?

  • HI Collin,

    Thank you for your reply.  CODEC will be used for AC measurements. 

    We have disable PGAs and Line/mic inputs for both channels, so technically it is pure ADC inputs what we acquiring data from.

    Concern what we have with regards to the "DC bias" between two channels  is fact when one channel can get saturated while measuring same signal level between two chaneels.

    Please advise.

    Thank you

  • Hello,

    We can take a look on one of our evaluation modules here in Dallas to see if we're seeing similar results but in general this is why the THD+N and other level related performance measurements are specified with a -2dBFS input signal.  This keeps issues from gain-error and offset error from causing the ADC to clip which would degrade the performance.  Most Audio ADCs are specified similarly with a -1dB or -2dBFS input signal for the same reason.

  • Hi Collin,

    Thank you for your reply. Question what we have if there is anything we can do to minimize DC bias; or if there are anything we can check to see if issue related to hardware or software.. 

    Thank you....

  • aaa bbb1, 

    If you enable the on board HPF using register 12 this will remove the DC offset.  

    best regards,

    -Steve wilson

  • thank you for all your help