Other Parts Discussed in Thread: PCM5102A
Can anyone help me with connecting pcm1864 to beaglebone by tdm to gain 4 channel recording? I am latest ti sdk and I only reach 2 channels by i2s.
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Marcin,
The PCM1864 is setup for I2S default. are you changing the mode to TDM by writing to register 11?
best regards,
-STeve wilson
Yes, I think so. Can you help me with dtsi and codec? I attched them below but I am not shure if these file is correct for tdm configuration. Now I am able to record 16Khz 4 channel but I get only some random data.
My pinout:
SCL - > P9 19
SDA -> P9 20
DOUT1A -> P9 41
LRCKA -> P9 27
BCKA -> P9 42
Here is my i2c configuration:
0x4a 0x0B 0x4F
0x4a 0x0C 0x01
0x4a 0x20 0xB0
0x4a 0x21 0x01
0x4a 0x22 0x01
0x4a 0x23 0x03
0x4a 0x25 0x07
0x4a 0x26 0x02
0x4a 0x27 0xFF
0x4a 0x28 0x01
0x4a 0x29 0x01
0x4a 0x2A 0x00
0x4a 0x2B 0x08
My pcm5102a codec:
static struct snd_soc_dai_driver pcm5102a_dai = {
.name = "pcm5102a-hifi",
.playback = {
.channels_min = 2,
.channels_max = 2,
.rates = SNDRV_PCM_RATE_8000_192000,
.formats = SNDRV_PCM_FMTBIT_S16_LE |
SNDRV_PCM_FMTBIT_S24_LE |
SNDRV_PCM_FMTBIT_S32_LE
},
.capture = {
.stream_name = "Capture",
.channels_min = 1,
.channels_max = 4,
.rates = SNDRV_PCM_RATE_8000_192000,
.formats = SNDRV_PCM_FMTBIT_S16_LE |
SNDRV_PCM_FMTBIT_S24_LE |
SNDRV_PCM_FMTBIT_S32_LE
},
};
static struct snd_soc_component_driver soc_component_dev_pcm5102a = {
.idle_bias_on = 1,
.use_pmdown_time = 1,
.endianness = 1,
.non_legacy_dai_naming = 1,
};
static int pcm5102a_probe(struct platform_device *pdev)
{
return devm_snd_soc_register_component(&pdev->dev, &soc_component_dev_pcm5102a,
&pcm5102a_dai, 1);
}
static const struct of_device_id pcm5102a_of_match[] = {
{ .compatible = "ti,pcm5102a", },
{ }
};
MODULE_DEVICE_TABLE(of, pcm5102a_of_match);
static struct platform_driver pcm5102a_codec_driver = {
.probe = pcm5102a_probe,
.driver = {
.name = "pcm5102a-codec",
.of_match_table = pcm5102a_of_match,
},
};
module_platform_driver(pcm5102a_codec_driver);
My extra dtsi file:
&am33xx_pinmux {
mcasp1_pins: mcasp1_pins {
pinctrl-single,pins = <
/* sink must enable receivers */
0x1a0 0x23 /* P9_42 mcasp1_aclkx - bit clock */
0x1a4 0x23 /* P9_27 mcasp1_fsx - frame sync */
0x1a8 0x23 /* P9_41 mcasp1_axr0 - i2s input */
>;
};
};
&mcasp1 {
#sound-dai-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&mcasp1_pins>;
status = "okay";
op-mode = <0>; /* MCASP_IIS_MODE */
tdm-slots = <4>;
num-serializer = <4>;
serial-dir = < /* 1 TX 2 RX 0 unused */
2 0 1 0
>;
rx-num-evt = <1>;
tx-num-evt = <1>;
};
/ {
pcm5102a: pcm5102a {
#sound-dai-cells = <0>;
compatible = "ti,pcm5102a";
status = "okay";
};
sound1: sound@1 {
compatible = "simple-audio-card";
simple-audio-card,name = "PCM5102a";
simple-audio-card,format = "dsp_a";
simple-audio-card,bitclock-master = <&sound1_master>;
simple-audio-card,frame-master = <&sound1_master>;
simple-audio-card,bitclock-inversion;
simple-audio-card,channels-capture-override = <4>;
simple-audio-card,cpu {
sound-dai = <&mcasp1>;
};
sound1_master: simple-audio-card,codec {
#sound-dai-cells = <0>;
sound-dai = <&pcm5102a>;
clocks = <&mcasp1_fck>;
clock-names = "mclk";
};
};
};
Marcin,
0x4a 0x0B 0x4F # Sets PCM186x to 16bit word length, TDM format (requires BCLK = 256 * FS)
0x4a 0x0C 0x01 # sets PCM186x to 4 channel TDM
0x4a 0x20 0xB0 # PCM186x is set as Audio bus master, but SCLK is set to PLL OUT (Generated from BCLK) This is incorrect
Above register should be configured to 0xA1 (SLAVE mode, BLCK generated SCK (PLL OUT) Auto config mode enabled)
OR if you want the PCM1864 in master mode, then it needs a master clock from a XTAL OR SCLK. so whichever you have.
The below registers only need to be set if auto configuration mode is off, or some only if the device is in master mode. but I would need more information from you regarding the SCLK or XTAL frequency before i can check the configuration.
I would recommend that you just set this up for auto configuration mode, and have the CPU be the master.
0x4a 0x21 0x01
0x4a 0x22 0x01
0x4a 0x23 0x03
0x4a 0x25 0x07
0x4a 0x26 0x02
0x4a 0x27 0xFF
0x4a 0x28 0x01
0x4a 0x29 0x01
0x4a 0x2A 0x00
0x4a 0x2B 0x08
best regards,
-Steve Wilson