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TLV320AIC3104: TDM interface with two AIC3104 as SLAVE / Is MCLK required?

Part Number: TLV320AIC3104
Other Parts Discussed in Thread: TLV320AIC1110

Team,

I saw this E2E post that suggest that the MCLK is not alaways needed.
Could you please confirm if the below scheme is ok to use?
Also what are the features/functionality that might be altered if MCLK is not used?
Can it sample in PCM 8bits (uLAW ou ALAW) ?

-CLK for TDM:
Here is the setup:
-Two AIC3104 for a total of 4 IN + 4 OUT channels:
        16 bits to TDM bus (16-, 20-, 24-, or 32-Bit Data)
-Clock: 8Mhz, FS: 16kHz

Fig 17 of the SLAS510F Datasheet suggest that BCLK can be used for ADC/DAC clocking (see picture below) however I saw that in the SLAA469A app note (Fig 2, Fig 4) that the ADC itself it clock by MCLK.

-Can you confirm that this scheme is possible without MCLK?
-what are the features/functionality that might be altered if MCLK is not used?

Thanks in advance!

A.

  • Hello,

    Yes, the above scheme can work. The ADC/DAC need a CLK source but it can be either MCLK or BCLK. If using BCLK, Register 102 in the datasheet allows the user to select the CLKDIV_IN and/or the PLLCLK_IN source as BCLK. 

    Regards,

    Aaron

  • Hello,

    I seems as though I missed your question on the AIC3104's ability to sample uLaw or ALaw audio. 

    The TLV32AIC3104 does not have the capability to sample uLaw or ALaw encoded audio as it only samples linear PCM. The encoded audio would have to be converted via external processor before transmission to the codec. However, the TLV320AIC1110 and the LM4935x devices can.

    Regards,

    Aaron