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TLV320ADC5140: TLV320ADC5140

Part Number: TLV320ADC5140

1) At present, our code is as follows, but the sound can be collected when playing the song, but it is not the song sound at all;Can you help me review the code? What's wrong?

//I2S
//TLV320ADC5140 is as a Slave mode;
//FSYNC = 16 kHz ( Sample Rate), BCLK = 2.56MHz (BCLK/FSYNC = 16)
//ch2 ; Analog single-ended input

res=TLV320_Write_Reg(0,0); //Bank0
if(res)return 1;
delay_ms(2);

res=TLV320_Write_Reg(0x01,0X01);//
delay_ms(2);


res=TLV320_Write_Reg(0x02,0X81);//Sleep, AREG
delay_ms(2);


res=TLV320_Write_Reg(0x07,0X40);//ASI_CFG0
delay_ms(2);


res=TLV320_Write_Reg(0x08,0X20);//ASI_CFG1
delay_ms(2);



res=TLV320_Write_Reg(0x0B,0X01);//ASI_CFG1
delay_ms(2);


res=TLV320_Write_Reg(0x0C,0X00);//ASI_CFG1
delay_ms(2);


res=TLV320_Write_Reg(0x13,0X00);//MST_CFG0
delay_ms(2);



res=TLV320_Write_Reg(0x16,0X80);//CLK_SRC MCLK
delay_ms(2);



//chann2
res=TLV320_Write_Reg(0x41,0X21);//
delay_ms(2);


res=TLV320_Write_Reg(0x42,0XA8);//
delay_ms(2);


res=TLV320_Write_Reg(0x43,0X99);//
delay_ms(2);


res=TLV320_Write_Reg(0x44,0X00);//
delay_ms(2);


res=TLV320_Write_Reg(0x45,0X00);//
delay_ms(2);


res=TLV320_Write_Reg(0x6C,0X48);//
delay_ms(2);


res=TLV320_Write_Reg(0x70,0X00);//
delay_ms(2);


res=TLV320_Write_Reg(0x73,0X40);//IN_CH_EN
delay_ms(2);


res=TLV320_Write_Reg(0x74,0X40);//ASI_OUT_CH_EN
delay_ms(2);


res=TLV320_Write_Reg(0x75,0XE0);//PWR_CFG
delay_ms(2);


res=TLV320_Write_Reg(0x76,0X40);//
delay_ms(2);


res=TLV320_Write_Reg(0x77,0XE0);//
delay_ms(2);

 

 

TLV320ADC5140 configure.txt
//I2S
//TLV320ADC5140 is as a Slave mode;
//FSYNC = 16 kHz ( Sample Rate), BCLK = 2.56MHz (BCLK/FSYNC = 16)
//ch2 ;   Analog single-ended input 

	res=TLV320_Write_Reg(0,0);	//Bank0
	if(res)return 1;			
	delay_ms(2);
	
	res=TLV320_Write_Reg(0x01,0X01);//
	delay_ms(2);
	
	
	res=TLV320_Write_Reg(0x02,0X81);//Sleep, AREG
	delay_ms(2);
	
	
	res=TLV320_Write_Reg(0x07,0X40);//ASI_CFG0
	delay_ms(2);

	
	res=TLV320_Write_Reg(0x08,0X20);//ASI_CFG1
	delay_ms(2);

	
	
	res=TLV320_Write_Reg(0x0B,0X01);//ASI_CFG1
	delay_ms(2);
	
	
	res=TLV320_Write_Reg(0x0C,0X00);//ASI_CFG1
	delay_ms(2);

	
	res=TLV320_Write_Reg(0x13,0X00);//MST_CFG0
	delay_ms(2);

	
	
	res=TLV320_Write_Reg(0x16,0X80);//CLK_SRC MCLK
	delay_ms(2);
	
	
	
	//chann2
	res=TLV320_Write_Reg(0x41,0X21);//
	delay_ms(2);

	
	res=TLV320_Write_Reg(0x42,0XA8);//
	delay_ms(2);
	
	


	res=TLV320_Write_Reg(0x43,0X99);//
	delay_ms(2);

	
	res=TLV320_Write_Reg(0x44,0X00);//
	delay_ms(2);

	
	res=TLV320_Write_Reg(0x45,0X00);//
	delay_ms(2);

	

	
	res=TLV320_Write_Reg(0x6C,0X48);//
	delay_ms(2);

	
	res=TLV320_Write_Reg(0x70,0X00);//
	delay_ms(2);

	
	res=TLV320_Write_Reg(0x73,0X40);//IN_CH_EN
	delay_ms(2);

	
	res=TLV320_Write_Reg(0x74,0X40);//ASI_OUT_CH_EN
	delay_ms(2);
	
	
	res=TLV320_Write_Reg(0x75,0XE0);//PWR_CFG
	delay_ms(2);
	
	
	res=TLV320_Write_Reg(0x76,0X40);//
	delay_ms(2);
	
	
	res=TLV320_Write_Reg(0x77,0XE0);//
	delay_ms(2);
	
	

2)The device integrates programmable channel gain and digital volume control  System, programmable microphone bias voltage, PLL, programmable high Pass filter (HPF), biquadratic filter, low delay filter mode,But we check the datasheet, which describes that the registers are all in page  0x00 to 0x04; we can only configure page 0x00, Will page 0x01 to 0x 04 not be provided to our users? How do we configure these Register parameters?

3)we check the “ Using the Automatic Gain Controller (AGC) in the TLV320ADCx140 ”。It is refer to page  0x06 to 0x07;Will page 0x06 to 0x 07 not be provided to our users? 

4)if these page 0x01 to 0x 07 is  not be provided to our users ,Can the parameters of the sound quality filter be set automatically? Where can I set it up?

  • [quote user="TI_st"]

    e “ Using the Automatic Gain Controller (AGC) in the TLV320ADCx140 ”。It is refer to page  0x06 to 0x07;Will page 0x06 to 0x 07 not be provided to our users? 

    4)if these

    ThankS

  • HI:

    In the case of the above code, the voice we recorded is as follows. Can  help me to check if there is any problem. Thank you!

     


  • Can  help me with this problem ?

  • Hi,

    Sorry for the delay in responding. Most of our team is on break on account of Christmas.

    In the device register setting you have enabled MCLK but in the comments you are referring to slave I2S mode.

    Do you intend to use ADC5140 in master mode or slave mode? What are the sampling rates and which channels are to be enabled?

    We will guide you with the configuration settings accordingly.

    Best Regards.

  • We are use the ADC5140  as  slave I2S mode, the sampling rates  16khz;only use  channel2;I2S mode,16 bits;

    We need your help;Thinks!

  • Hi,

    Slave mode needs only a few registers to be configured. Please refer to the attached file where I have modified your configuration. After you get the basic setup running, you can enable AGC and program the parameters according to your needs.

    adc5140_ti_modified.txt
    //I2S
    //TLV320ADC5140 is as a Slave mode;
    //FSYNC = 16 kHz ( Sample Rate), BCLK = 2.56MHz (BCLK/FSYNC = 16)
    //ch2 ;   Analog single-ended input 
    
    	res=TLV320_Write_Reg(0,0);	//Bank0
    	if(res)return 1;			
    	delay_ms(2);
    	
    	res=TLV320_Write_Reg(0x01,0X01);//
    	delay_ms(2);
    	
    	
    	res=TLV320_Write_Reg(0x02,0X81);//Sleep, AREG
    	delay_ms(2);
    	
    	
    	res=TLV320_Write_Reg(0x07,0X40);//ASI_CFG0 - I2S Mode
    	delay_ms(2);
    	
    	//chann2
    	res=TLV320_Write_Reg(0x41,0X21);//
    	delay_ms(2);
    
    	
    	res=TLV320_Write_Reg(0x42,0XA8);//
    	delay_ms(2);
    	
    
    	res=TLV320_Write_Reg(0x43,0X99);//
    	delay_ms(2);
    
    	
    	res=TLV320_Write_Reg(0x44,0X00);//
    	delay_ms(2);
    
    	
    	res=TLV320_Write_Reg(0x45,0X00);//
    	delay_ms(2);
    
    		
    	res=TLV320_Write_Reg(0x73,0X40);//IN_CH_EN
    	delay_ms(2);
    
    	
    	res=TLV320_Write_Reg(0x74,0X40);//ASI_OUT_CH_EN
    	delay_ms(2);
    	
    	
    	res=TLV320_Write_Reg(0x75,0XE0);//PWR_CFG
    	delay_ms(2);
    	
    	
    	
    	

    Best Regards.

  • HI

    Thank you for your help. After comparing your configuration with ours, what is the function of 0x6c register?

    According to your configuration, do I only need to configure AGC related registers? For example:0x42、0x43、0x44、0x45?

  • Hi

    Page 0, register 0x6C is for enabling some of the signal processing functions like AGC and biquads.

    After you get the basic recording functionality working, please go through the AGC application note to configure the AGC.

    Channel 2 configuration registers are from register 0x42 to register 0x45, and since you only have channel 2 enabled you have to configure them.

    Are you able to get proper recording now?

    Best Regards.

  • Now it is not possible to use adc5140 modified configuration;Then I changed the register(0x43) to 0xFA,The audio problems after recording are as follows

  • Sorry for the delay in responding. We had a few days of break on account of New Year.

    Audio recording does not appear to be proper. Could you please share the audio sub-system schematics and the configuration script? I have send you a request to privately connect on E2E in case you prefer sharing the schematics privately.

    Best Regards.

  • Hi,

    I notice discrepancy between the schematics, configuration and comments in the files that you shared.

    1. In the schematic the mic seems to be connected to channel 3 while you seem to be configuring registers corresponding to channel 2.

    2. What is the true BCLK/FSYNC ratio? In the file that you shared it is mentioned as 16 but with BCLK of 2.56 MHz results in a ratio of 160. Please confirm on this aspect.

    In addition and depending on the above you will also have to configure the ASI slots using ASI_CH<NUM> registers.

    Best Regards.

  • Hi

    1) In the schematic the mic is be connected to channel 1、 channel 2、channel 3,Now channel 1-3 are  not successful, so I want to turn the single channel on first,So I can see that there are only  channels 3 in the screenshot of the schematic diagram. In fact, all channels 1.3 are connected;

    2)

    I2S mode

    ASI word or slot length    16bits

    slave mode

  • Thanks for that clarification regarding the microphone connections.

    Please also clarify the frequency of BCLK. Is it 256 kHz or 2.56 MHz?

    Best Regards.

  • Did you get a chance to look into BCLK clocking?

    Best Regards.

  • HI

     BCLK clocking is 512khz;

  • 1)The device integrates programmable channel gain and digital volume control  System, programmable microphone bias voltage, PLL, programmable high Pass filter (HPF), biquadratic filter, low delay filter mode,But we check the datasheet, which describes that the registers are all in page  0x00 to 0x04; we can only configure page 0x00, Will page 0x01 to 0x 04 not be provided to our users? How do we configure these Register parameters?

    2)we check the “ Using the Automatic Gain Controller (AGC) in the TLV320ADCx140 ”。It is refer to page  0x06 to 0x07;Will page 0x06 to 0x 07 not be provided to our users? 

    3)if these page 0x01 to 0x 07 is  not be provided to our users ,Can the parameters of the sound quality filter be set automatically? Where can I set it up?