Part Number: TLV320AIC3106
Hi,
We're designing a PCB and we plan to place a TLV320AIC3106. The spec about MAX/MIN Analog input voltage is (source SLAS509F –DECEMBER 2006–REVISED DECEMBER 2014):
| Analog input voltage | to AVSS_ADC | –0.3 | AVDD + 0.3 | V |
So, the analog signal cannot be less than 0.3V, so this signal must have a bias.
However, on the evaluation board the signal is decoupled with a 100n capacitor.
- Should the line input signal have a bias voltage?
- If yes, why do the specifications speak of a minimum analog input voltage of 0.3V?